ADUC702X_1 AD [Analog Devices], ADUC702X_1 Datasheet - Page 36

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ADUC702X_1

Manufacturer Part Number
ADUC702X_1
Description
Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
Manufacturer
AD [Analog Devices]
Datasheet
ADuC702x Series
OTHER ANALOG PERIPHERALS
DAC
The ADuC702x incorporate dual 12-bit voltage output DACs
on-chip. Each DAC has a rail-to-rail voltage output buffer
capable of driving 5kΩ/100pF. Each buffer can be bypassed.
Each DAC has three selectable ranges, 0V to V
bandgap 2.5V reference), 0V to DAC
AV
Bit
6
5
4
3
2
1-0
Bit
6
23-12
11-0
DD
. DAC
Name
DACBYP
DACCLK
DACCLR
Description
Reserved
12-bit data for DAC0
Reserved
REF
is equivalent to an external reference for the
Description
Buffer bypass bit:
Set by the user to bypass the output buffer.
Cleared by user to buffer the DAC output. By default the DAC is buffered.
DAC update rate:
Set by the user to update the DAC using timer1.
Cleared by user to update the DAC using the core clock.
DAC clear bit:
Set by the user to enable normal DAC operation.
Cleared by user to reset data register of the DAC to zero.
Reserved This bit should be left at ‘0’
Reserved This bit should be left at ‘0’
DAC range bits
00
01
10
11
Power down mode. The DAC output is in tri-state
0-DAC
0-V
0-AV
REF
REF
(pin 56) and 0V to
DD
(2.5V) range
Table 19: DAC0CON MMR bit designations
REF
Table 20: DAC0DAT MMR bit designations
range
range
REF
(internal
Rev. PrA | Page 36 of 78
DAC. The signal range is 0V to AV
DAC MMRs interface
Each DAC is configurable independently through a Control
register and a Data register. These two registers are identical for
the four DACs and only DAC0CON and DAC0DAT will be
described in detail.
Preliminary Technical Data
DD
.

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