SAK-XC2264-56F66L INFINEON [Infineon Technologies AG], SAK-XC2264-56F66L Datasheet - Page 33

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SAK-XC2264-56F66L

Manufacturer Part Number
SAK-XC2264-56F66L
Description
16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SAK-XC2264-56F66L AC
Manufacturer:
Infineon Technologies
Quantity:
10 000
XC2267 / XC2264
XC2000 Family Derivatives
Preliminary
Functional Description
1024 bytes (2 × 512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are word wide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the XC2000 Family. Therefore, they
should either not be accessed, or written with zeros, to ensure upward compatibility.
In order to meet the needs of designs where more memory is required than is provided
on chip, up to 12 Mbytes (approximately, see
Table
3) of external RAM and/or ROM can
be connected to the microcontroller. The External Bus Interface also provides access to
external peripherals.
Up to 768 Kbytes of on-chip Flash memory store code, constant data, and control
data. The on-chip Flash memory consists of up to 3 modules with a maximum capacity
of 256 Kbytes each. Each module is organized in 4-Kbyte sectors. One 4-Kbyte sector
of Flash module 0 is used internally to store operation control parameters and protection
information.
Note: The actual size of the Flash memory depends on the chosen derivative (see
Table
1).
1)
Each sector can be separately write protected
, erased and programmed (in blocks of
128 Bytes). The complete Flash area can be read-protected. A user-defined password
sequence temporarily unlocks protected areas. The Flash modules combine 128-bit
read accesses with protected and efficient writing algorithms for programming and
erasing. Dynamic error correction provides extremely high read data security for all read
accesses. Accesses to different Flash modules can be executed in parallel.
For timing characteristics, please refer to
Section
4.4.2, for further Flash parameters,
please refer to
Section
5.3.
1) To save control bits, sectors are clustered for protection purposes, they remain separate for
programming/erasing.
Data Sheet
31
V0.1, 2007-02
Draft Version

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