SAK-XC2264-56F66L INFINEON [Infineon Technologies AG], SAK-XC2264-56F66L Datasheet - Page 43
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SAK-XC2264-56F66L
Manufacturer Part Number
SAK-XC2264-56F66L
Description
16/32-Bit Single-Chip Microcontroller with 32-Bit Performance
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
1.SAK-XC2264-56F66L.pdf
(101 pages)
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SAK-XC2264-56F66L AC
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XC2267 / XC2264
XC2000 Family Derivatives
Preliminary
Functional Description
3.5
On-Chip Debug Support (OCDS)
The On-Chip Debug Support system provides a broad range of debug and emulation
features built into the XC226x. The user software running on the XC226x can thus be
debugged within the target system environment.
The OCDS is controlled by an external debugging device via the debug interface,
consisting of the IEEE-1149-conforming JTAG port and a break interface. The debugger
controls the OCDS via a set of dedicated registers accessible via the JTAG interface.
Additionally, the OCDS system can be controlled by the CPU, e.g. by a monitor program.
An injection interface allows the execution of OCDS-generated instructions by the CPU.
Multiple breakpoints can be triggered by on-chip hardware, by software, or by an
external trigger input. Single stepping is supported as well as the injection of arbitrary
instructions and read/write access to the complete internal address space. A breakpoint
trigger can be answered with a CPU-halt, a monitor call, a data transfer, or/and the
activation of an external signal.
Tracing data can be obtained via the JTAG interface or via the external bus interface for
increased performance.
The debug interface uses a set of 6 interface signals (4 JTAG lines, 2 optional break
lines) to communicate with external circuitry.
Data Sheet
41
V0.1, 2007-02
Draft Version
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