TDA6650ATT NXP [NXP Semiconductors], TDA6650ATT Datasheet
TDA6650ATT
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TDA6650ATT Summary of contents
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... Rev. 02 — 2 February 2007 1. General description The TDA6650ATT; TDA6651ATT is a programmable 3-band mixer/oscillator and low phase noise PLL synthesizer intended for pure 3-band tuner concepts applied to hybrid (digital and analog) or digital-only terrestrial and cable TV reception. Table 1. ...
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... Wideband AGC detector for internal tuner AGC: N Six programmable take-over points N Two programmable time constants N AGC flag TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer 2 C-bus; six serial bytes are required to address the device, 2 C-bus write mode) 2 C-bus read mode) 2 C-bus addresses Rev. 02 — ...
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... TDA6650ATT/C3 TSSOP38 TDA6650ATT/C3/S2 TDA6651ATT/C3 TDA6651ATT/C3/S2 TDA6651ATT/C3/S3 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Description plastic thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm Rev. 02 — 2 February 2007 Version SOT510-1 © NXP B.V. 2007. All rights reserved. ...
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... SDA I C-BUS 17 (22) TRANSCEIVER AS 13 (26) BVS POR The pin numbers in parenthesis represent the TDA6651ATT. Fig 1. Block diagram TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer IFFIL1 V IFFIL2 CCA 26 (13) 6 (33) 7 (32) LOW MIXER BS1 MID MIXER ...
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... XTAL1 XTAL2 n. CCD PLLGND V CCA IFOUTB IFOUTA IFGND HOSCIN1 HOSCOUT1 HOSCOUT2 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Pin description Pin TDA6650ATT TDA6651ATT ...
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... XTOUT 18 19 XTAL1 Fig 2. Pin configuration TDA6650ATT 7. Functional description 7.1 Mixer, Oscillator and PLL (MOPLL) functions Bit BS1 enables the BS1 port, the low band mixer and the low band oscillator. Bit BS2 enables the BS2 port, the mid band mixer and the mid band oscillator. When both BS1 and BS2 bits are logic 0, the high band mixer and the high band oscillator are enabled ...
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... Open-circuit 7.3 Phase noise, I While the TDA6650ATT; TDA6651ATT is dedicated for hybrid terrestrial applications, the low noise PLL will clean up the noise spectrum of the VCOs close to the carrier to reach noise levels at 1 kHz offset from the carrier compatible with e.g. ISDB-T reception. TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT ...
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... C-bus transceiver has an auto-increment facility that permits programming the device within one single transmission (address + 5 data bytes). The TDA6650ATT; TDA6651ATT can also be partly programmed on the condition that the first data byte following the address is byte 2 (divider byte 1) or byte 4 (control byte 1). The fi ...
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... N14 to N0 T/A T2, T1 and T0 R2, R1, and R0 ATC AL2, AL1 and AL0 CP2, CP1 and CP0 BS5, BS4, BS3, BS2 and BS1 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer DIVIDER CONTROL CONTROL CONTROL BYTE 2 BYTE 1 BYTE 2 BYTE 1 2 ...
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... MHz, 2 MHz or 1 MHz. Table 10 the value of bits R2, R1 and R0 are changed necessary to re-send the data bytes DB1 and DB2. TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Address selection CC to 0.3V or open-circuit ...
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... The charge pump current can be chosen from 8 values depending on the value of bits CP2, CP1 and CP0 bits; see Table 12. CP2 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Reference divider ratio select bits R1 R0 Reference divider ratio ...
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... MSB is transmitted first. Table 14. Bit A POR FL AGC A2, A1, A0 Table 15. Voltage applied to pin ADC 0.6V CC 0.45V CC TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Charge pump current …continued CP1 CP0 Charge pump current number ...
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... X means that this bit is not set or reset at power-on reset. [2] The next six bits are written, when bit T write sequence. [3] The next six bits are written, when bit T write sequence. TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer ADC levels …continued [1] to 0.45V ...
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... HBIN1 1 38 HBIN2 2 37 MBIN 3 36 LBIN 4 35 RFGND 5 34 IFFIL1 6 33 IFFIL2 7 32 BS4 8 31 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Average DC voltage versus band selection Low Mid High n.a. n.a. 1.0 V n.a. n.a. 1.0 V n.a. 1.8 V n.a. 1.8 V n.a. n. 3.7 V 3.7 V 3.7 V 3 ...
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... BS3 10 29 BS2 11 28 BS1 12 27 BVS 13 26 ADC/BS5 14 25 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid 3.5 V 3.5 V high-Z or high ...
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... SDA XTOUT 18 21 XTAL1 19 20 XTAL2 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid high-Z high-Z high-Z high-Z 1.25 V 1.25 V 3.45 V 3.45 V 2.2 V 2.2 V 2.2 V 2.2 V n.a. n.a. Rev. 02 — 2 February 2007 ...
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... IFOUTA 28 11 IFGND 29 10 HOSCIN1 30 9 HOSCOUT1 31 8 HOSCOUT2 32 7 HOSCIN2 33 6 TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid 1 2.1 V 2 ...
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... IC and negative currents are going out of the IC; all voltages are referenced to ground [1] (GND) Symbol V CCA V CCD SDA I SDA V SCL V AS TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer …continued Average DC voltage versus band selection Low Mid 2.3 V 1.3 V 2 1.7 V 1.4 V 2.9 V 3.5 V Limiting values . Parameter ...
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... The junction temperature influences strongly the reliability of an IC. The printed-circuit board used in the application contributes in a large part to the overall thermal characteristic. It must therefore be insured that the junction temperature of the IC never exceeds T TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Limiting values …continued . ...
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... Z output impedance o TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer 30 for hybrid application; unless otherwise specified. Conditions PMOS ports off one PMOS port on: sourcing 15 mA two PMOS ports on: one port sourcing 15 mA and one other port ...
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... Table 12 tuning supply voltage = 33 V tuning supply voltage = offset from the carrier digital application: TDA6650ATT/C3/S2, TDA6651ATT/C3/S2, TDA6651ATT/C3/S3 hybrid application: TDA6650ATT/C3, TDA6651ATT/C3 Rev. 02 — 2 February 2007 load or with a Figure 27 and 28 for digital application or in the Min Typ Max - - 400 ...
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... Figure 219.43 MHz; see Figure 91.25 MHz to 219.43 MHz; RF see Figure 5 for hybrid application TDA6650ATT/C3, TDA6651ATT/C3 picture carrier for digital only application TDA6650ATT/C3/S2, TDA6651ATT/C3/S2, TDA6651ATT/C3/S3 Rev. 02 — 2 February 2007 load or with a Figure 27 and 28 for digital application or in the Min Typ ...
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... MHz 465.143 MHz RF asymmetrical IF output see Figure 25 see Figure 6 see Figure 6 for hybrid application TDA6650ATT/C3, TDA6651ATT/C3 picture carrier for digital only application TDA6650ATT/C3/S2, TDA6651ATT/C3/S2, TDA6651ATT/C3/S3 Rev. 02 — 2 February 2007 load or with a Figure 27 and 28 for digital application or in the Min Typ ...
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... TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer 30 for hybrid application; unless otherwise specified. Conditions picture carrier for hybrid application TDA6650ATT/C3, TDA6651ATT/C3 picture carrier for digital only application TDA6650ATT/C3/S2, TDA6651ATT/C3/S2, TDA6651ATT/C3/S3 asymmetrical IF output; load = 75 ; see Figure 471.25 MHz ...
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... Figure 10, 27 and 28 1.4 MHz frequency offset; worst case in the frequency range; see Figure 27 and 28 TDA6650ATT/C3; TDA6651ATT/C3 1 kHz frequency offset MHz; see Figure 11, comp and 30 10 kHz frequency offset; worst case in the frequency range; see Figure ...
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... Figure 10, 27 and 28 1.4 MHz frequency offset; worst case in the frequency range; see Figure 27 and 28 TDA6650ATT/C3; TDA6651ATT/C3 1 kHz frequency offset MHz; see comp Figure 11, 29 and 30 10 kHz frequency offset; worst case in the frequency range; see Figure ...
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... Figure 11, 27 and 28 1.4 MHz frequency offset; worst case in the frequency range; see Figure 27 and 28 TDA6650ATT/C3; TDA6651ATT/C3 1 kHz frequency offset MHz; comp see Figure 11, 29 and 30 10 kHz frequency offset; worst case in the frequency range; see ...
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... The V level is measured when the pin XTOUT is loaded with parallel with 10 pF. XTOUT TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer 30 for hybrid application; unless otherwise specified. Conditions V = 100 dB V; worst case in the ...
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... 142.86 kHz in digital applications and f step [14] This is the level of the 13rd and 15th harmonics of the 4 MHz crystal oscillator into the IF output. [15] The AGC pin (pin 9 for TDA6650ATT and pin 30 for TDA6651ATT) must not be connected to a voltage higher than 3 Fig 5. Input admittance ( the low band mixer (40 MHz to 200 MHz) ...
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... Fig 6. Input admittance ( the mid band mixer (100 MHz to 500 MHz Fig 7. Input impedance ( the high band mixer (350 MHz to 800 MHz TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer ...
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... For measurement circuit see Fig 9. 10 kHz phase noise typical performance in digital application TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer 350 450 550 Figure 27 and Figure 28 350 450 550 ...
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... For measurement circuit see Fig 11. 1 kHz phase noise typical performance in hybrid application TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer 350 450 550 Figure 27 and Figure 28 350 450 550 Figure 29 ...
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... For measurement circuit see Fig 13. 100 kHz phase noise typical performance in hybrid application TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer 350 450 550 Figure 29 and Figure 30 350 450 550 ...
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... NXP Semiconductors Fig 14. Gain (G Fig 15. Gain (G TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer signal source meas V i RMS voltmeter Z >> meas meas V = V’ + 3.75 dB. ...
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... 2.5 pF trimmer turns, 4.5 mm, 0.4 mm wire air coil 4.7 nF. TL: 50 semi rigid cable length = 75 mm. Fig 17. Input circuit for optimum noise figure measurement TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer LBIN BNC RIM IFOUTA or MBIN ...
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... Wanted signal source at f RFpix The level of unwanted signal turns turns. N1/ Fig 19. Cross modulation measurement in low and mid band with symmetrical IF output TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer LBIN A C IFOUTA or MBIN V ...
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... NXP Semiconductors Fig 20. Gain ( Fig 21. Gain (G TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer signal source 50 A HYBRID meas RMS voltmeter Loss in hybrid = 1 dB loss = meas V = V’ + 3.75 dB. ...
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... Wanted signal source at f RFpix Unwanted output signal at f The level of unwanted signal is measured by causing 0 modulation in the wanted signal. Fig 23. Cross modulation measurement in high band with asymmetrical IF output TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer A HBIN1 C DUT HYBRID ...
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... V e meas Loss in hybrid = 1 dB loss. i meas Fig 26. Maximum RF input level without lock-out in high band with asymmetrical IF output TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer A C HBIN1 IFOUTA HYBRID DUT B D HBIN2 IFOUTB ...
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... NXP Semiconductors The TDA6650ATT; TDA6651ATT PLL loop stability is guaranteed in the configuration of the Figure 27 minimum, the pull-up resistor, R19 and all of the local oscillators are aligned to operate at a maximum tuning voltage the configuration is changed, there might be an impact on the loop stability. ...
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... MBIN OSCGND 3 (36) (3) 36 LBIN MOSCIN2 4 (35) (4) 35 RFGND MOSCIN1 5 (34) (5) 34 IFFIL1 HOSCIN2 6 (33) (6) 33 IFFIL2 HOSCOUT2 7 (32) (7) 32 TDA6650ATT BS4 HOSCOUT1 8 (31) (8) 31 (TDA6651ATT) AGC HOSCIN1 9 (30) (9) 30 BS3 IFGND 10 (29) (10) 29 BS2 IFOUTA 11 (28) (11) 28 BS1 IFOUTB 12 (27) ...
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LOW MID HIGH1 C4 C3 4 TOKO 500 C27 C26 AGC TP1 C28 150 nF D4 R20 ...
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... MBIN OSCGND 3 (36) (3) 36 LBIN MOSCIN2 4 (35) (4) 35 RFGND MOSCIN1 5 (34) (5) 34 IFFIL1 HOSCIN2 6 (33) (6) 33 IFFIL2 HOSCOUT2 7 (32) (7) 32 TDA6650ATT BS4 HOSCOUT1 8 (31) (8) 31 (TDA6651ATT) AGC HOSCIN1 9 (30) (9) 30 BS3 IFGND 10 (29) (10) 29 BS2 IFOUTA 11 (28) (11) 28 BS1 IFOUTB 12 (27) ...
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LOW MID HIGH1 C4 C3 4 TOKO 500 C27 C26 AGC TP1 C28 150 nF D4 R20 ...
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... Crystal oscillator The TDA6650ATT; TDA6651ATT needs to be used with a 4 MHz crystal in series with a capacitor with a typical value of 18 pF, connected between pin XTAL1 and pin XTAL2. Philips crystal 4322 143 04093 is recommended. When choosing a crystal, take care to select a crystal able to withstand the drive level of the TDA6650ATT ...
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... Start S [1] Control byte 1 with bit T program AGC time constant bit ATC and AGC take-over point bits AL2, AL1 and AL0. TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Complete sequence 1 Divider Divider byte byte 1 ...
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... Control byte 1 with bit T program AGC time constant bit ATC and AGC take-over point bits AL2, AL1 and AL0. TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Sequence to change only the AGC data Address byte ...
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... Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT510-1 Fig 31. Package outline SOT510-1 (TSSOP38) TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer ...
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... Inspection and repair • Lead-free soldering versus PbSn soldering 16.3 Wave soldering Key characteristics in wave soldering are: TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Rev. 02 — 2 February 2007 © NXP B.V. 2007. All rights reserved ...
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... Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer and 29 SnPb eutectic process (from J-STD-020C) Package reflow temperature ( C) ...
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... AGC ISDB-T NTSC PLL PMOS QAM VCO VCR TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer maximum peak temperature = MSL limit, damage level temperature minimum peak temperature = minimum soldering temperature MSL: Moisture Sensitivity Level Abbreviations Description ...
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... TDA6650ATT_6651ATT_1 20041214 (9397 750 14179) TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer Data sheet status Product data sheet The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. ...
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... Contact information For additional information, please visit: For sales office addresses, send an email to: TDA6650ATT_6651ATT_2 Product data sheet TDA6650ATT; TDA6651ATT 5 V mixer/oscillator and low noise PLL synthesizer [3] Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. ...
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... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: TDA6650ATT_6651ATT_2 All rights reserved. Date of release: 2 February 2007 ...