TDA6650ATT NXP [NXP Semiconductors], TDA6650ATT Datasheet - Page 10

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TDA6650ATT

Manufacturer Part Number
TDA6650ATT
Description
5 V mixer/oscillator and low noise PLL synthesizer for hybrid terrestrial tuner (digital and analog)
Manufacturer
NXP [NXP Semiconductors]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TDA6650ATT/C3
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
TDA6650ATT_6651ATT_2
Product data sheet
8.1.1 I
8.1.2 XTOUT output buffer and mode setting
8.1.3 Step frequency setting
The device address contains programmable address bits MA1 and MA0, which offer the
possibility of having up to four MOPLL ICs in one system.
between the voltage applied to the AS input and the MA1 and MA0 bits.
Table 8.
The crystal frequency can be sent to pin XTOUT and used in the application, for example
to drive the clock input of a digital demodulator, saving a quartz crystal in the bill of
material. To output f
is not used, it is recommended to disable it, by setting T[2:0] to 000. This pin is also used
to output
on, supplying the f
setting of the T[2:0] bits is given in
Table 9.
[1]
[2]
The step frequency is set by three bits, giving five steps to cope with different application
requirements.
The reference divider ratio is automatically set depending on bits R2, R1 and R0. The
phase detector works at either 4 MHz, 2 MHz or 1 MHz.
Table 10
the value of bits R2, R1 and R0 are changed, it is necessary to re-send the data bytes
DB1 and DB2.
Voltage applied to pin AS
0 V to 0.1V
0.2V
0.4V
0.9V
T2
0
0
0
0
1
1
1
1
2
C-bus address selection
This is an on-chip function that automatically sets internal values for the PLL. This function is not optimized
for ISDB-T and NTSC Japan and therefore must not be used.
This is the default mode at power-on reset. This mode disables the tuning voltage.
CC
CC
CC
to 0.3V
to 0.6V
to V
shows the step frequencies and corresponding reference divider ratios. When
1
CC
2
Address selection
XTOUT buffer status and test modes
CC
f
T1
0
0
1
1
0
0
1
1
div
CC
CC
and f
or open-circuit
xtal
xtal
comp
signal. The relation between the signal on pin XTOUT and the
Rev. 02 — 2 February 2007
, it is necessary to set T[2:0] to 001. If the output signal on this pin
T0
0
1
0
1
0
1
0
1
in a test mode. At power-on, the XTOUT output buffer is set to
TDA6650ATT; TDA6651ATT
Pin XTOUT
disabled
f
1
f
f
1
f
disabled
Table
xtal
xtal
comp
xtal
5 V mixer/oscillator and low noise PLL synthesizer
2
2
f
f
div
div
(4 MHz)
(4 MHz)
(4 MHz)
9.
Mode
normal mode with XTOUT buffer off
normal mode with XTOUT buffer on
charge pump off
not used
test mode
test mode
charge pump sinking current
charge pump sourcing current
MA1
0
0
1
1
Table 8
[1]
gives the relationship
© NXP B.V. 2007. All rights reserved.
MA0
0
1
0
1
[2]
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