M58LT256JSB8ZA6 STMICROELECTRONICS [STMicroelectronics], M58LT256JSB8ZA6 Datasheet - Page 105

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M58LT256JSB8ZA6

Manufacturer Part Number
M58LT256JSB8ZA6
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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M58LT256JST, M58LT256JSB
Revision history
Table 49.
18-Dec-2006
23-Feb-2007
31-Oct-2006
27-Jun-2007
18-Jul-2006
Date
Document revision history
Revision
0.1
0.2
0.3
1
2
Initial release.
Description of CR2-CR0 011 value modified in
Configuration Register
Table 12: Burst type definition
Timings modified in
cycles,.
V
ratings.
Values changed in
V
Figure 24: Erase Suspend & Resume flowchart and pseudocode
modified.
Appendix D: Command interface state tables
Document status promoted from Target Specification to Preliminary
Data. Small text changes.
Output Enable modified.
Section 6.9: Burst length bits (CR2-CR0)
Device architecture corrected (see
Figure 3: Memory map
I
characteristics -
Suspend ac waveforms
modified under
ac
Synchronous Burst Read ac
Burst Read Suspend ac waveforms
Read ac
Asynchronous Read ac
Appendix B: Common Flash Interface
Block Lock Down confirm (2Fh) removed from
interface states - lock table, next state
interface states - lock table, next output
Document status promoted from Preliminary Data to full Datasheet.
Section 7.2: Synchronous Burst Read mode
16 word boundary (wrap) feature removed from the document.
Two packing options added in
scheme.
Small text changes.
DD1
IO
PP1
characteristics). t
max and V
and I
modified in
characteristics. t
DD6
parameter values updated in
DDQ
Other conditions
currents.
Table 21: DC characteristics -
Table 20: DC characteristics -
max modified in
Table 16: Program/Erase times and endurance
ELTV
and Note 2 added.
and
modified. t
characteristics.
Section 5.4: Program Status bit (SR4)
timing removed from
ELTV
Figure 13: Synchronous Burst Read
Wait (WAIT)
Appendix A: Block address
waveforms,
Changes
modified.
Table 28: Ordering information
timing modified in
(see
PLWL
Table 2: Bank
Table 17: Absolute maximum
and
Table 26: Reset and Power-up
modified.
and
, t
signal behavior in relation to
state. Small text changes.
Table 23: Synchronous
PLEL
Figure 13: Synchronous
modified.
Table 48: Command
Table 20: DC
modified.
, t
modified.
Figure 11:
Table 47: Command
PLGL
Table 11:
voltages.
Table 22:
currents.
architecture,
Revision history
and t
tables).
PLLL
105/106
values
and

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