M58LT256JSB8ZA6 STMICROELECTRONICS [STMicroelectronics], M58LT256JSB8ZA6 Datasheet - Page 13

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M58LT256JSB8ZA6

Manufacturer Part Number
M58LT256JSB8ZA6
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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M58LT256JST, M58LT256JSB
2.7
2.8
2.9
2.10
2.11
2.12
Latch Enable (L)
Latch Enable latches the address bits on its rising edge. The address latch is transparent
when Latch Enable is at V
Clock (K)
The clock input synchronizes the memory to the microcontroller during synchronous read
operations; the address is latched on a Clock edge (rising or falling, according to the
configuration settings) when Latch Enable is at V
read and in write operations.
Wait (WAIT)
Wait is an output signal used during Synchronous Read to indicate whether the data on the
output bus are valid. This output is high impedance when Chip Enable is at V
Enable is at V
one clock cycle in advance.
V
V
power supply for all operations (Read, Program and Erase).
V
V
independently from V
V
V
voltage range applied to the pin.
If V
a voltage lower than V
the V
relevant values). V
value after the operation has started does not have any effect and program or erase
operations continue.
If V
stable until the Program/Erase algorithm is completed.
DD
DDQ
PP
DD
DDQ
PP
PP
PP
is both a control input and a power supply pin. The two functions are selected by the
provides the power supply to the internal core of the memory device. It is the main
PP1
provides the power supply to the I/O pins and enables all outputs to be powered
Program supply voltage
is kept in a low voltage range (0 V to V
supply voltage
is in the range of V
supply voltage
range enables these functions (see Tables
IH
or Reset is at V
PP
DD
is only sampled at the beginning of a program or erase; a change in its
PPLK
.
PPH
IL
gives absolute protection against program or erase, while V
and it is inhibited when Latch Enable is at V
it acts as a power supply pin. In this condition V
IL
. It can be configured to be active during the wait cycle or
DDQ
) V
IL
. Clock is ignored during asynchronous
PP
20
is seen as a control input. In this case
and 21, DC Characteristics for the
Signal descriptions
IH
.
IH
PP
, Output
must be
13/106
PP
in

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