HYI39S512160AE-7.5 QIMONDA [Qimonda AG], HYI39S512160AE-7.5 Datasheet - Page 14

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HYI39S512160AE-7.5

Manufacturer Part Number
HYI39S512160AE-7.5
Description
512-Mbit Synchronous DRAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
1)
2) These parameters depend on the cycle rate. All values are measured at 133 MHz for “-7.5” components with the outputs open. Input
3) These parameters are measured with continuous data stream during read access and all DQ toggling. CL=3 and BL=4 is assumed and
4)
Rev. 1.52, 2007-06
03292006-6Y91-0T2Z
Parameter
Operating Current
Precharge Standby Current
No Operating Current
Burst Operating Current
Auto Refresh Current
Self Refresh Current
Symbol
I
I
I
I
I
I
I
I
DD1
DD2P
DD2N
DD3N
DD3P
DD4
DD5
DD6
signals are changed once during
the
t
T
RFC
A
= 0 to 70 °C for HYB..,
V
=
DDQ
t
RFC(min)
current is excluded.
“burst refresh”,
Test Condition
t
CS =
CS =
CS =
CS =
t
t
RC
RFC
RFC
=
=
= 15.6 µs
V
V
t
V
V
t
RC(min)
RFC(min)
IH (min.)
IH (min.)
IH(min)
IH(min)
T
A
t
= -40 to 85 °C for i-temp part (HYI..);
RFC
,
, CKE ≥
, CKE ≤
, CKE ≤
, CKE≥
I
= 15.6 µs “distributed refresh”.
O
t
ck
= 0 mA
.
V
V
V
V
IH(min.)
IL(max)
IH(min)
IL(max.)
One bank active, Burst length = 1
Power down mode
Non-power down mode
Active state (max. 4 banks)
Read command cycling
Auto Refresh command cycling
Self Refresh Mode, CKE=0.2 V,
14
V
SS
= 0 V,
V
DD
–7.5
Typ.
123
0.6
23
26
2
97
255
2.1
,
V
t
DDQ
CK
=infinity
= +3.3 V ± 0.3 V
I
DD
Max.
145
3
31
35
4
123
300
4
Specifications and Conditions
HY[I/B]39S512[40/80/16]0A[E/T]
512-Mbit Synchronous DRAM
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
Internet Data Sheet
I
TABLE 10
TABLE 11
DD
Note
2)3)
2)
2)
2)
2)
2)3)
4)
Conditions
Symbol
I
I
I
I
I
I
I
I
DD1
DD2P
DD2N
DD3N
DD3P
DD4
DD5
DD6
1)

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