HYB18T512800BF QIMONDA [Qimonda AG], HYB18T512800BF Datasheet - Page 12

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HYB18T512800BF

Manufacturer Part Number
HYB18T512800BF
Description
240-Pin Registered DDR2 SDRAM Modules
Manufacturer
QIMONDA [Qimonda AG]
Datasheet

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Rev. 1.1, 2007-03
03292006-EO3M-LEK7
Ball No.
Other Pins
19, 102, 137, 138,
220, 221
195
77
Abbreviation
SSTL
CMOS
OD
Abbreviation
I
O
I/O
AI
PWR
GND
NU
NC
NC
ODT0
ODT1
NC
Name
Pin
Type
NC
I
I
NC
Description
Serial Stub Terminated Logic (SSTL_18)
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate,
and allows multiple devices to share as a wire-OR.
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Usable
Not Connected
Buffer
Type
SSTL
SSTL
Function
Not connected
On-Die Termination Control 1:0
Note: 2-Ranks module
Note: 1-Rank modules
12
HYS72T[64/128/256]xxxHP–[25F/2.5/3/3S/3.7]–B
240-Pin Registered DDR2 SDRAM
Abbreviations for Buffer Type
Abbreviations for Pin Type
Internet Data Sheet
TABLE 6
TABLE 7

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