M58WR032FB60ZB6 STMICROELECTRONICS [STMicroelectronics], M58WR032FB60ZB6 Datasheet - Page 68

• Manufacturer Part Number: M58WR032FB60ZB6
• Description: 32 Mbit (2Mb x 16, Multiple Bank, Burst) 1.8V Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

M58WR032FT, M58WR032FB
Note: 1. The variable P is a pointer which is defined at CFI offset 15h.
68/86
(P+3C)h = 75h
(P+3D)h = 76h
(P+35)h = 6Eh
(P+36)h = 6Fh
(P+3A)h = 73h
(P+3B)h = 74h
(P+3E)h = 77h
(P+3F)h = 78h
(P+37)h = 70h
(P+38)h = 71h
(P+39)h = 72h
M58WR032FT (top)
Offset
2. Bank Regions. There are two Bank Regions, see
Data
03h
07h
00h
20h
00h
64h
00h
01h
03h
(P+3D)h = 76h
(P+3E)h = 77h
(P+3F)h = 78h
M58WR032FB (bottom)
Offset
Data
03h
Table 28.
Bank Region 2 (Erase Block Type 1): Page mode and
synchronous mode capabilities (defined in table 10)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Bank Region 2 Erase Block Type 2 Information
Bits 0-15: n+1 = number of identical-sized erase blocks
Bits 16-31: n×256 = number of bytes in erase block region
Bank Region 2 (Erase Block Type 2)
Minimum block erase cycles × 1000
Bank Region 2 (Erase Block Type 2): BIts per cell, internal
ECC
Bits 0-3: bits per cell in erase region
Bit 4: reserved for “internal ECC used”
BIts 5-7: reserved
Bank Region 2 (Erase Block Type 2): Page mode and
synchronous mode capabilities (defined in table 10)
Bit 0: Page-mode reads permitted
Bit 1: Synchronous reads permitted
Bit 2: Synchronous writes permitted
Bits 3-7: reserved
Feature Space definitions
Reserved
and
Table 29.
Description