P89LPC980 NXP [NXP Semiconductors], P89LPC980 Datasheet - Page 12

• Manufacturer Part Number: P89LPC980
• Description: 8-bit microcontroller with accelerated two-clock 80C51 core, 4 kB/8 kB wide-voltage byte-erasable flash with 10-bit ADC
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
Table 3.
P89LPC980_982_983_985_2
Preliminary data sheet
Symbol
P1.7/AD04/T3EX/
MOSI
P2.0 to P2.7
P2.0/AD07/TXD
P2.1/AD06/RXD
P2.2/MOSI
P2.3/MISO
P2.4/SS
P2.5/SPICLK
P2.6/SCL
P2.7/SDA
P3.0 to P3.1
Pin description
Pin
PLCC28,
TSSOP28
4
1
2
13
14
15
16
27
28
…continued
Type Description
I/O
I
I
I/O
I/O
I/O
I
O
I/O
I
I
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P1.7 — Port 1 bit 7. High current source.
AD04 — ADC0 channel 4 analog input. (P89LPC985)
T3EX — Timer/counter 3 external capture input.
MOSI — SPI master out slave in. When configured as master, this pin is output;
when configured as slave, this pin is input. (pin remap)
Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. During reset
Port 2 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 2 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to
7.16.1 “Port configurations”
All pins have Schmitt trigger inputs.
Port 2 also provides various special functions as described below:
P2.0 — Port 2 bit 0.
AD07 — ADC0 channel 7 analog input. (P89LPC985)
TXD — Transmitter output for serial port. (pin remap)
P2.1 — Port 2 bit 1.
AD06 — ADC0 channel 6 analog input. (P89LPC985)
RXD — Receiver input for serial port. (pin remap)
P2.2 — Port 2 bit 2.
MOSI — SPI master out slave in. When configured as master, this pin is output;
when configured as slave, this pin is input.
P2.3 — Port 2 bit 3.
MISO — SPI master in slave out.When configured as master, this pin is input,
when configured as slave, this pin is output.
P2.4 — Port 2 bit 4.
SS — SPI Slave select.
P2.5 — Port 2 bit 5.
SPICLK — SPI clock. When configured as master, this pin is output; when
configured as slave, this pin is input.
P2.6 — Port 2 bit 6.
SCL — I
P2.7 — Port 2 bit 7.
SDA — I
Port 3: Port 3 is a 2-bit I/O port with a user-configurable output type. During reset
Port 3 latches are configured in the input only mode with the internal pull-up
disabled. The operation of Port 3 pins as inputs and outputs depends upon the port
configuration selected. Each port pin is configured independently. Refer to
7.16.1 “Port configurations”
All pins have Schmitt trigger inputs.
Port 3 also provides various special functions as described below:
Rev. 02 — 8 February 2010
2
2
C-bus serial clock input/output. (pin remap)
C-bus serial data input/output. (pin remap)
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC980/982/983/985
and
and
Table 13 “Static characteristics”
Table 13 “Static characteristics”
© NXP B.V. 2010. All rights reserved.
for details.
for details.
Section
Section
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