R5F21133DFP RENESAS [Renesas Technology Corp], R5F21133DFP Datasheet - Page 201

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R5F21133DFP

Manufacturer Part Number
R5F21133DFP
Description
16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY/R8C/Tiny SERIES
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Part Number:
R5F21133DFP#U0
Manufacturer:
Renesas Electronics America
Quantity:
10 000
R8C/13 Group
Rev.1.20
REJ09B0111-0120
19.2.6 Changing Interrupt Control Register
(1) Each interrupt control register can only be changed while interrupt requests corresponding to that
(2) When changing any interrupt control register after disabling interrupts, be careful with the instruc-
When Changing Any Bit Other Than IR Bit
When Changing IR Bit
(3) When disabling interrupts using the I flag, set the I flag according to the following sample pro-
Sample programs 1 to 3 are preventing the I flag from being set to “1” (interrupt enabled) before writing
to the interrupt control registers for reasons of the internal bus or the instruction queue buffer.
Example 1: Use NOP instructions to prevent I flag being set to “1”
Example 2: Use dummy read to have FSET instruction wait
Example 3: Use POPC instruction to change I flag
Jan 27, 2006
If an interrupt request corresponding to that register is generated while executing the instruction, the
IR bit may not be set to “1” (interrupt requested), and the interrupt request may be ignored. If this
causes a problem, use the following instructions to change the register.
Instructions to use: AND, OR, BCLR, BSET
If the IR bit is set to “0” (interrupt not requested), it may not be set to “0” depending on the instruction
used. Use the MOV instruction to set the IR bit to “0”.
register are not generated. If interrupt requests may be generated, disable the interrupts before
changing the interrupt control register.
tion to be used.
grams. Refer to (2) for the change of interrupt control registers in the sample programs.
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM, R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
before interrupt control register is changed
page 190 of 205
I
#00H, 0056H ; Set TXIC register to “00
I
I
#00H, 0056H ; Set TXIC register to “00
I
I
#00H, 0056H ; Set TXIC register to “00
FLG
; Disable interrupts
; Enable interrupts
; Disable interrupts
; Dummy read
; Enable interrupts
; Disable interrupts
; Enable interrupts
16
16
16
19. Usage Notes

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