X40431 XICOR [Xicor Inc.], X40431 Datasheet - Page 14

• Manufacturer Part Number: X40431
• Description: 4kbit EEPROM, Triple Voltage Monitor with Integrated CPU Supervisor
• Manufacturer: XICOR [Xicor Inc.]

Word Address
The word address is either supplied by the master or
obtained from an internal counter. The internal counter
is undefined on a power up condition.
Operational Notes
The device powers-up in the following state:
– The device is in the low power standby state.
– The WEL bit is set to ‘0’. In this state it is not possible
– SDA pin is the input mode.
– RESET/RESET Signal is active for
Figure 16. Sequential Read Sequence
X40430/X40431 – Preliminary Information
REV 1.2.3 11/28/00
to write to the device.
Signals from
Signals from
the Master
the Slave
SDA Bus
Address
Slave
1
C
A
K
t
PURST
Data
(1)
.
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A
C
K
Data
(2)
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– The WEL bit must be set to allow write operations.
– The proper clock count and bit sequence is required
– A three step sequence is required before writing into
– The WP pin, when held HIGH, prevents all writes to
prior to the stop bit in order to start a nonvolatile write
cycle.
the Control Register to change Watchdog Timer or
Block Lock settings.
the array and all the Register.
A
C
K
(n is any integer greater than 1)
Characteristics subject to change without notice.
Data
(n-1)
C
A
K
Data
(n)
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t