AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 24

• Manufacturer Part Number: AK4343EN
• Description: Stereo DAC with HP/RCV/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
There are the following four clock modes to interface with external devices (see Table 2 and Table 3).
Mode
PLL Master Mode (Note 37)
PLL Slave Mode 1
(PLL Reference Clock: MCKI pin)
PLL Slave Mode 2
(PLL Reference Clock: LRCK or BICK pin)
EXT Slave Mode
EXT Master Mode
Note 37. If M/S bit = “1”, PMPLL bit = “0” and MCKO bit = “1” during the setting of PLL Master Mode, the invalid
Mode
PLL Master Mode
PLL Slave Mode
(PLL Reference Clock: MCKI pin)
PLL Slave Mode
(PLL Reference Clock: LRCK or BICK pin)
EXT Slave Mode
EXT Master Mode
The M/S bit selects either master or slave mode. M/S bit = “1” selects master mode and “0” selects slave mode. When the
AK4343 is power-down mode (PDN pin = “L”) and exits reset state, the AK4343 is slave mode. After exiting reset state,
the AK4343 goes to master mode by changing M/S bit = “1”.
When the AK4343 is used by master mode, LRCK and BICK pins are a floating state until M/S bit becomes “1”. LRCK
and BICK pins of the AK4343 should be pulled-down or pulled-up by the resistor (about 100kΩ) externally to avoid the
floating state.
MS0478-E-01
System Clock
Master Mode/Slave Mode
clocks are output from MCKO pin when MCKO bit is “1”.
Table 4. Select Master/Slave Mode
Table 2. Clock Mode Setting (x: Don’t care)
M/S bit
Table 3. Clock pins state in Clock Mode
0
1
OPERATION OVERVIEW
MCKO bit
PMPLL bit
0
1
0
1
0
0
0
1
1
1
0
0
Master Mode
Slave Mode
- 24 -
Mode
Selected by
Selected by
MCKO pin
PS1-0 bits
PS1-0 bits
“L”
“L”
“L”
“L”
“L”
M/S bit
1
0
0
0
1
Default
PLL3-0 bits
PLL3-0 bits
Selected by
Selected by
Selected by
Selected by
MCKI pin
FS1-0 bits
FS1-0 bits
GND
PLL3-0 bits
See Table 5
See Table 5
See Table 5
x
x
PLL3-0 bits)
(Selected by
(Selected by
(Selected by
BCKO bit)
BCKO bit)
BICK pin
(≥ 32fs)
(≥ 32fs)
Output
Output
Input
Input
Input
Figure 18
Figure 19
Figure 20
Figure 21
Figure 22
Figure 23
Figure
LRCK pin
Output
Output
[AK4343]
Input
Input
Input
(1fs)
(1fs)
(1fs)
(1fs)
(1fs)
2006/10