AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 31
AK4343EN
Manufacturer Part Number
AK4343EN
Description
Stereo DAC with HP/RCV/SPK-AMP
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
1.AK4343EN.pdf
(98 pages)
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ASAHI KASEI
The AK4343 becomes EXT Master Mode by setting PMPLL bit = “0” and M/S bit = “1”. Master clock is input from
MCKI pin, the internal PLL circuit is not operated. The clock required to operate is MCKI (256fs, 512fs or 1024fs). The
input frequency of MCKI is selected by FS1-0 bits (see Table 14).
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be improved by using higher frequency of the master clock. The S/N of the DAC output
through LOUT/ROUT pins at fs=8kHz is shown in Table 15.
MCKI should always be present whenever the DAC is in operation (PMDAC bit = “1”). If MCKI is not provided, the
AK4343 may draw excess current and it is not possible to operate properly because utilizes dynamic refreshed logic
internally. If MCKI is not present, the DAC should be in the power-down mode (PMDAC bit = “0”).
MS0478-E-01
EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”)
Mode
0
1
2
3
Table 14. MCKI Frequency at EXT Master Mode (PMPLL bit = “0”, M/S bit = “1”)
FS3-2 bits
Don’t care
Don’t care
Don’t care
Don’t care
Table 15. Relationship between MCKI and S/N of LOUT/ROUT pins
AK4343
Table 16. BICK Output Frequency at Master Mode
1024fs
MCKI
256fs
512fs
FS1 bit
BCKO bit
MCKO
MCKI
BICK
LRCK
SDTI
0
0
1
1
0
1
Figure 23. EXT Master Mode
(fs=8kHz, 20kHzLPF + A-weighted)
FS0 bit
256fs, 512fs or 1024fs
0
1
0
1
32fs or 64fs
BICK Output
Frequency
- 31 -
1fs
32fs
64fs
MCKI Input
83dB
93dB
93dB
S/N
Frequency
1024fs
256fs
256fs
512fs
MCLK
BCLK
LRCK
SDTO
Default
DSP or µP
Sampling Frequency
7.35kHz ∼ 48kHz
7.35kHz ∼ 13kHz
7.35kHz ∼ 48kHz
7.35kHz ∼ 26kHz
Range
Default
[AK4343]
2006/10
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