AK4343EN AKM [Asahi Kasei Microsystems], AK4343EN Datasheet - Page 30

• Manufacturer Part Number: AK4343EN
• Description: Stereo DAC with HP/RCV/SPK-AMP
• Manufacturer: AKM [Asahi Kasei Microsystems]

ASAHI KASEI
When PMPLL bit is “0”, the AK4343 becomes EXT mode. Master clock is input from MCKI pin, the internal PLL circuit
is not operated. This mode is compatible with I/F of the normal audio DAC. The clocks required to operate are MCKI
(256fs, 512fs or 1024fs), LRCK (fs) and BICK (≥32fs). The master clock (MCKI) should be synchronized with LRCK.
The phase between these clocks does not matter. The input frequency of MCKI is selected by FS1-0 bits (see Table 12).
The S/N of the DAC at low sampling frequencies is worse than at high sampling frequencies due to out-of-band noise.
The out-of-band noise can be improved by using higher frequency of the master clock. The S/N of the DAC output
through LOUT/ROUT pins at fs=8kHz is shown in Table 13.
The external clocks (MCKI, BICK and LRCK) should always be present whenever the DAC is in operation (PMDAC bit
= “1”). If these clocks are not provided, the AK4343 may draw excess current and it is not possible to operate properly
because utilizes dynamic refreshed logic internally. If the external clocks are not present, the DAC should be in the
power-down mode (PMDAC bit = “0”).
MS0478-E-01
EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
Mode
0
1
2
3
Table 12. MCKI Frequency at EXT Slave Mode (PMPLL bit = “0”, M/S bit = “0”)
FS3-2 bits
Don’t care
Don’t care
Don’t care
Don’t care
Table 13. Relationship between MCKI and S/N of LOUT/ROUT pins
AK4343
1024fs
MCKI
256fs
512fs
FS1 bit
MCKO
MCKI
BICK
LRCK
SDTI
0
0
1
1
Figure 22. EXT Slave Mode
(fs=8kHz, 20kHzLPF + A-weighted)
FS0 bit
256fs, 512fs or 1024fs
0
1
0
1
- 30 -
≥ 32fs
1fs
MCKI Input
83dB
93dB
93dB
S/N
Frequency
1024fs
256fs
256fs
512fs
MCLK
BCLK
LRCK
SDTO
DSP or µP
Sampling Frequency
7.35kHz ∼ 48kHz
7.35kHz ∼ 13kHz
7.35kHz ∼ 48kHz
7.35kHz ∼ 26kHz
Range
Default
[AK4343]
2006/10