WM8980CGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM8980CGEFL/RV Datasheet - Page 2

• Manufacturer Part Number: WM8980CGEFL/RV
• Description: Stereo CODEC with Speaker Driver and Video Buffer
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

WM8980
DESCRIPTION ....................................................................................................... 1
BLOCK DIAGRAM ................................................................................................ 1
FEATURES ............................................................................................................ 1
APPLICATIONS ..................................................................................................... 1
TABLE OF CONTENTS ......................................................................................... 2
PIN CONFIGURATION .......................................................................................... 4
ORDERING INFORMATION .................................................................................. 4
PIN DESCRIPTION ................................................................................................ 5
ABSOLUTE MAXIMUM RATINGS ........................................................................ 6
RECOMMENDED OPERATING CONDITIONS ..................................................... 6
ELECTRICAL CHARACTERISTICS ..................................................................... 7
SPEAKER OUTPUT THD VERSUS POWER ...................................................... 11
POWER CONSUMPTION .................................................................................... 12
AUDIO PATHS OVERVIEW ................................................................................ 14
SIGNAL TIMING REQUIREMENTS .................................................................... 15
INTERNAL POWER ON RESET CIRCUIT .......................................................... 19
DEVICE DESCRIPTION ...................................................................................... 21
REGISTER MAP .................................................................................................. 93
DIGITAL FILTER CHARACTERISTICS ............................................................ 113
w
TERMINOLOGY ............................................................................................................ 10
ESTIMATING SUPPLY CURRENT ............................................................................... 12
SYSTEM CLOCK TIMING ............................................................................................. 15
AUDIO INTERFACE TIMING – MASTER MODE .......................................................... 15
AUDIO INTERFACE TIMING – SLAVE MODE ............................................................. 16
CONTROL INTERFACE TIMING – 3-WIRE MODE ...................................................... 17
CONTROL INTERFACE TIMING – 2-WIRE MODE ...................................................... 18
INTRODUCTION ........................................................................................................... 21
INPUT SIGNAL PATH ................................................................................................... 23
ANALOGUE TO DIGITAL CONVERTER (ADC) ........................................................... 31
INPUT LIMITER / AUTOMATIC LEVEL CONTROL (ALC) ............................................ 35
OUTPUT SIGNAL PATH ............................................................................................... 47
3D STEREO ENHANCEMENT ...................................................................................... 54
ANALOGUE OUTPUTS ................................................................................................. 54
VIDEO BUFFER ............................................................................................................ 70
DIGITAL AUDIO INTERFACES ..................................................................................... 74
AUDIO SAMPLE RATES ............................................................................................... 79
MASTER CLOCK AND PHASE LOCKED LOOP (PLL) ................................................ 79
GENERAL PURPOSE INPUT/OUTPUT ........................................................................ 83
OUTPUT SWITCHING (JACK DETECT)....................................................................... 84
CONTROL INTERFACE ................................................................................................ 86
RESETTING THE CHIP ................................................................................................ 87
POWER SUPPLIES ....................................................................................................... 87
RECOMMENDED POWER UP/DOWN SEQUENCE .................................................... 87
POWER MANAGEMENT .............................................................................................. 92
REGISTER BITS BY ADDRESS ................................................................................... 95
TERMINOLOGY .......................................................................................................... 113
DAC FILTER RESPONSES ........................................................................................ 114
ADC FILTER RESPONSES ........................................................................................ 114
HIGHPASS FILTER ..................................................................................................... 115
TABLE OF CONTENTS
PP, Rev 3.8, May 2012
Pre-Production
2