WM9712CLGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM9712CLGEFL/RV Datasheet - Page 55

• Manufacturer Part Number: WM9712CLGEFL/RV
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
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POWER MANAGEMENT
The WM9712L includes the standard power down control register defined by the AC’97 specification
(register 26h). Additionally, it also allows more specific control over the individual blocks of the device
through register 24h. Each particular circuit block is active when both the relevant bit in register 26h
AND the relevant bit in register 24h are set to ‘0’.
Table 41 Powerdown and Status Register (Conforms to AC’97 Rev 2.2)
As can be seen from the table above, most blocks are ‘ON’ by default. However, if pin 47
(GPIO4/ADA/MASK) is held high during reset, the WM9712L starts up with all blocks powered down
by default, saving power. This is achieved by connecting a pull-up resistor (e.g. 100k) from pin 47 to
DBVDD. Note that the state of pin 47 during reset only affects register 26h.
REGISTER
ADDRESS
26h
Powerdown/
Status
register
BIT
14
13
12
11
10
9
8
3
2
1
0
LABEL
DAC
ADC
PR6
PR5
PR4
PR3
PR2
PR1
PR0
REF
ANL
DEFAULT
NORMAL
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
0 (ON)
1
1
1
1
PIN 47 ‘HI’
DURING
RESET
1 (OFF)
1 (OFF)
1 (OFF)
1 (OFF)
1 (OFF)
1 (OFF)
1 (OFF)
0
0
0
0
DESCRIPTION
Disables HPOUTL, HPOUTR and
OUT3 Buffer
Disables internal clock
Disables AC-link interface
(external clock off)
Disables VREF, analogue mixers
and outputs
Disables analogue mixers, LOUT2,
ROUT2 (but not VREF)
Disables stereo DAC
Disables audio ADCs and input
Mux
Read-only bit, indicates VREF is
ready (inverse of PR2)
Read-only bit, indicates analogue
mixers are ready (inverse of PR3)
Read-only bit, indicates audio
DACs are ready (inverse of PR1)
Read-only bit, indicates audio
ADCs are ready (inverse of PR0)
PD, Rev 4.6, November 2011
WM9712L
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