WM9712CLGEFL/RV WOLFSON [Wolfson Microelectronics plc], WM9712CLGEFL/RV Datasheet - Page 69

• Manufacturer Part Number: WM9712CLGEFL/RV
• Manufacturer: WOLFSON [Wolfson Microelectronics plc]

Production Data
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REG
ADDR
58h
REG
ADDR
5Ch
REG
ADDR
60h
62h
Register 58h controls several additional functions.
Register 5Ch controls several additional functions.
Registers 60h and 62h control the ALC and Noise Gate functions.
BIT
15:13
12
11
10
3:2
1
0
BIT
15
14
13:12
11
10:9
8
7
6:5
4
3
2
1:0
BIT
15:12
11:8
7:4
3:0
15:14
13:11
10:9
8
7
5
4:0
LABEL
COMP2DEL
JIEN
FRC
SVD
DIE REV
WAKEEN
IRQ INV
LABEL
AMUTE
C1REF
C1SRC
C2REF
C2SRC
DS
AMEN
VBIAS
ADCO
HPF
ENT
ASS
LABEL
ALCL
HLD
DCY
ATK
ALCSEL
MAXGAIN
ZC TIMEOUT
ALCZC
NGAT
NGG
NGTH
DEFAULT
0
0 (AVDD/2)
00 (OFF)
0 (AVDD/2)
00 (OFF)
0
0 (OFF)
00
0
0
0
00
DEFAULT
000 (no delay)
0
0
0 (enabled)
Indicates device revision. 00=Rev.A, 01=Rev.B, 10=Rev.C
0 (no wake-up)
0 (not inverted)
0000 (0 ms)
0011 (192 ms)
111 (+30dB)
0 (OFF)
0 (hold gain)
00000 (-76.5dB)
DEFAULT
1011 (-12dB)
0010 (24 ms)
00 (OFF)
11 (slowest)
0 (OFF)
DESCRIPTION
Read-only bit to indicate DAC auto-muting
Selects Comparator 1 Reference Voltage
Selects Comparator 1 Signal Source
Selects Comparator 1 Reference Voltage
Selects Comparator 1 Signal Source
Selects differential microphone input pins. 0=MIC1
and MIC2, 1=LINEL and LINER
Enables DAC Auto-Mute
Selects analogue bias for lowest power, depending
on AVDD supply. 0X=3.3V, 10=2.5V, 11=1.8V
Selects source of SPDIF data. 0=from SDATAOUT,
1= from audio ADC
Disables ADC high-pass filter
Enables thermal sensor
Selects time slots for stereo ADC data. 00=slots 3
and 4, 01=7/8, 10=6/9, 11=10/11
DESCRIPTION
Selects Comparator 2 delay
Enables Jack Insert Detection
Forces Jack Insert Detection
Disables VREF for lowest possible power
consumption
Enables GPIO wake-up
Inverts the IRQ signal (pin 45)
Selects noise gate type. 0=hold gain, 1=mute
DESCRIPTION
Controls ALC threshold
Controls ALC hold time
Controls ALC decay time
Controls ALC attack time
Controls which channel ALC operates on. 00=none,
01=right only, 10=left only, 11=both
Controls upper gain limit for ALC
Controls time-out for zero-cross detection
Enables zero-cross detection for ALC
Enables noise gate function
Controls noise gate threshold
REFER TO
Battery Alarm
Analogue Audio Outputs, Jack
Insertion and Auto-Switching
Power Management
N/A
GPIO and Interrupt Control
PD, Rev 4.6, November 2011
REFER TO
Audio DACs, Stereo DACs
Battery Alarm
Analogue Inputs,
Microphone Input
Power Management
Digital Audio (SPDIF) Output
Audio ADC
Analogue Audio Outputs,
Thermal Sensor
Audio ADC, ADC Slot
Mapping
WM9712L
REFER TO
Audio ADC,
Automatic
Level Control
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