A54SX08-1BG208 ETC1 [List of Unclassifed Manufacturers], A54SX08-1BG208 Datasheet - Page 9
A54SX08-1BG208
Manufacturer Part Number
A54SX08-1BG208
Description
54SX Family FPGAs
Manufacturer
ETC1 [List of Unclassifed Manufacturers]
Datasheet
1.A54SX08-1BG208.pdf
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5 4 S X F a m i l y F PG A s
S X P r o b e C i r cu it C o n t r o l P i n s
The Silicon Explorer II tool uses the boundary scan ports
(TDI, TCK, TMS and TDO) to select the desired nets for
verification. The selected internal nets are assigned to the
PRA/PRB pins for observation.
interconnection between Silicon Explorer II and the FPGA
to perform in-circuit verification. The TRST pin is equipped
with a pull-up resistor. To remove the boundary scan state
machine from the reset state during probing, it is
Figure 7 • Probe Setup
Serial Connection
Figure 7
illustrates the
Silicon Explorer II
v3.1
recommended that the TRST pin be left floating.
De s ig n Co ns id e r at io ns
The TDI, TCK, TDO, PRA, and PRB pins should not be used
as input or bidirectional ports. Because these pins are
active during probing, critical signals input through these
pins are not available while probing. In addition, the
Security Fuse should not be programmed because doing so
disables the Probe Circuitry.
TMS
TDO
TCK
TDI
PRA
PRB
SX FPGA
9
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