ISP1130DL Philips Semiconductors, ISP1130DL Datasheet - Page 37
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ISP1130DL
Manufacturer Part Number
ISP1130DL
Description
Universal Serial Bus compound hub with integrated keyboard controller
Manufacturer
Philips Semiconductors
Datasheet
1.ISP1130DL.pdf
(68 pages)
- Current page: 37 of 68
- Download datasheet (2Mb)
Table 51: PCON register: bit allocation
Table 53: USBCON register: bit allocation
Philips Semiconductors
9397 750 06895
Objective specification
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Powered
R/W
Self
W
7
0
7
0
-
10.3.2 Power Control register (PCON)
10.3.3 USB Control register (USBCON)
SYNCLK
Enable
R/W
Table 50: Register bank selection
Table 52: PCON register: bit description
Bit
7 to 5
4
3
2
1
0
W
6
0
6
1
-
RS1
0
0
1
1
KBDMatrix
Disable
R/W
Symbol
-
WLE
GF1
GF0
PD
IDL
W
5
0
5
1
-
RS0
0
1
0
1
Rev. 01 — 23 March 2000
GL-MEMSEL
Selection
Description
reserved
Watchdog Load Enable. Writing a logic 1 enables writing to the
watchdog timer register and starts the watchdog timer for the first
time. A logic 0 disables writing to the watchdog timer register.
The watchdog timer can be stopped by writing 55H to the
WDTKEY register (see
General purpose flag set or reset by software.
General purpose flag set or reset by software.
Writing a logic 1 activates Power-down mode and switches off the
clock. When the microcontroller wakes up from Power-down mode
this bit is cleared to logic 0.
Writing a logic 1 activates Idle mode, switching off the normal clock
and turning on the sleep clock. A reset or interrupt returns the
microcontroller from Idle to normal mode and clears this bit to
logic 0.
WLE
R/W
W
4
0
4
1
Register bank
OverCurrent
USB compound hub with keyboard controller
0
1
2
3
Enable
GF1
R/W
W
3
0
3
1
Table
AnalogOC
Disable
70) or by a hardware reset.
GF0
R/W
W
2
0
2
1
Address range (Hex)
© Philips Electronics N.V. 2000. All rights reserved.
Connect_N
R/W
Soft
PD
W
08 to 0F
18 to 1F
00 to 07
10 to 17
1
0
1
1
ISP1130
Suspend
Clock
R/W
IDL
W
0
0
0
0
37 of 68
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