ISP1130DL Philips Semiconductors, ISP1130DL Datasheet - Page 39

• Manufacturer Part Number: ISP1130DL
• Description: Universal Serial Bus compound hub with integrated keyboard controller
• Manufacturer: Philips Semiconductors

Philips Semiconductors
9397 750 06895
Objective specification
10.4 Hub control registers
10.5 Interrupt structure
The hub control registers (Command and Data) are mapped to the external data
memory space of the 80C51 as shown in
MOVX instruction.
Table 57: Hub control registers: address mapping
The ISP1130 implements a 6-source interrupt structure with 2 priority levels. The
interrupt vector addresses and polling sequence is given in
priority levels are set via the Interrupt Polarity (IP) register (see
interrupts can be enabled or disabled via the Interrupt Enable (IE) register (see
Table
Table 58: Interrupt vectors and polling sequence
External interrupt 0 (EX0) is generated by the USB core when an activity occurs for
any of the three embedded functions. Interrupt EX0 is level-triggered and sets bit IE0
in the TCON register. IE0 is cleared by hardware when the service routine is entered.
External interrupt 1 (EX1) is generated by a key press in the matrix. Interrupt EX1 is
level-triggered and sets bit IE1 in the TCON register. IE1 is cleared by hardware
when the service routine is entered. When the device is in ‘suspend’ state (the
microcontroller clock is disabled), interrupt EX1 is registered and an internal Remote
Wakeup is generated to restart the PLL and the clocks. When the device resumes its
function and the clock to microcontroller core has been restored, the firmware
branches to the interrupt service routine for EX1.
External interrupt 2 (IN2) is generated by input pin INT, which is edge-triggered
(HIGH-to-LOW transition).
Timer 0 and Timer 1 interrupts are generated by a timer register overflow (except for
Timer 0 in Mode 3), signalled by bits TF0 and TF1 in the TCON register. The bit that
generated the interrupt is cleared by hardware, when the service routine is entered.
Register
Command
Data
Source
EX0
ET0
EX1
ET1
I2C
IN2
59).
Description
external 0 interrupt (USB)
timer 0 interrupt
external 1 interrupt (keyboard)
timer 1 interrupt
I
external 2 interrupt (input INT)
2
C-bus interrupt
Rev. 01 — 23 March 2000
Access
write
read/write
USB compound hub with keyboard controller
Table
57. To access these registers use a
Address (Hex)
FFFE
FFFF
Table
© Philips Electronics N.V. 2000. All rights reserved.
Vector address
0003H
000BH
0013H
001BH
0023H
002BH
Table
58. The interrupt
ISP1130
61) and the
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