ISP1130DL Philips Semiconductors, ISP1130DL Datasheet - Page 47

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ISP1130DL

Manufacturer Part Number
ISP1130DL
Description
Universal Serial Bus compound hub with integrated keyboard controller
Manufacturer
Philips Semiconductors
Datasheet
Philips Semiconductors
9397 750 06895
Objective specification
11.1 Protocol
11.2 Hardware connections
The I
Each device on the I
select a device for access.
The master starts a data transfer using a START condition and ends it by generating
a STOP condition. Transfers can only be initiated when the bus is free. The receiver
must acknowledge each byte by means of a LOW level on SDA during the ninth clock
pulse on SCL.
For detailed information please consult The I
9398 393 40011.
Via the I
(PCF8582 or equivalent). The hardware connections are shown in
The SCL and SDA pins are multiplexed with pins MX3 and MX4 respectively. Pin
MEMSEL/UPGL can be used as a chip select output to select external devices, such
as smart card readers, UARTs, etc.
The slave address which ISP1130 uses to access the EEPROM is 1010000B. Page
mode addressing is not supported, so pins A0, A1 and A2 of the EEPROM must be
connected to GND (logic 0).
idth
Fig 8. EEPROM connection diagram.
Bus free: both SDA and SCL are HIGH
START: a HIGH-to-LOW transition on SDA, while SCL is HIGH
STOP: a LOW-to-HIGH transition on SDA, while SCL is HIGH
Data valid: after a START condition, data on SDA are stable during the HIGH
period of SCL; data on SDA may only change while SCL is LOW.
2
C-bus protocol defines the following conditions:
2
C-bus interface the ISP1130 can be connected to an external EEPROM
ISP1130
USB HUB
Rev. 01 — 23 March 2000
2
MX4/SDA
MX3/SCL
C-bus has a unique slave address, which the master uses to
V DD
USB compound hub with keyboard controller
I
R P
2
C-bus
V DD
2
R P
C-bus and how to use it ., order number
SCL
SDA
PCF8582
equivalent
EEPROM
or
© Philips Electronics N.V. 2000. All rights reserved.
MGS808
A0
A1
A2
Figure
ISP1130
8.
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