RD48F2000P0ZBQ0 Intel Corporation, RD48F2000P0ZBQ0 Datasheet - Page 7
RD48F2000P0ZBQ0
Manufacturer Part Number
RD48F2000P0ZBQ0
Description
Intel StrataFlash Embedded Memory
Manufacturer
Intel Corporation
Datasheet
1.RD48F2000P0ZBQ0.pdf
(102 pages)
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1.1
1.2
Datasheet
Introduction
This document provides information about the Intel StrataFlash® Embedded Memory (P30) device
and describes its features, operation, and specifications.
Nomenclature
Acronyms
1.8 V :
3.0 V :
9.0 V :
Block :
Main block :
Parameter block :
Top parameter device :
Bottom parameter device :
BEFP :
CUI :
MLC :
OTP :
PLR :
PR :
RCR :
Intel StrataFlash
Order Number: 306666, Revision: 001
V
V
V
A group of bits, bytes,1-Gbit P30 Family or words within the
flash memory array that erase simultaneously when the Erase
command is issued to the device. The 1-Gbit P30 Family has
two block sizes: 32-KByte and 128-KByte.
An array block that is usually used to store code and/or data.
Main blocks are larger than parameter blocks.
An array block that is usually used to store frequently changing
data or small system parameters that traditionally would be
stored in EEPROM.
A device with its parameter blocks located at the highest
physical address of its memory map.
A device with its parameter blocks located at the lowest
physical address of its memory map.
Buffer Enhanced Factory Programming
Command User Interface
Multi-Level Cell
One-Time Programmable
Protection Lock Register
Protection Register
Read Configuration Register
CCQ
PP
CC
®
voltage range of 8.5 V – 9.5 V
Embedded Memory (P30)
(core) voltage range of 1.7 V – 2.0 V
(I/O) voltage range of 1.7 V – 3.6 V
1-Gbit P30 Family
April 2005
7
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