RD48F2000P0ZBQ0 Intel Corporation, RD48F2000P0ZBQ0 Datasheet - Page 98

• Manufacturer Part Number: RD48F2000P0ZBQ0
• Description: Intel StrataFlash Embedded Memory
• Manufacturer: Intel Corporation

1-Gbit P30 Family
Table 38.
Table 39.
April 2005
98
Protection Register Information
Burst Read Information
P = 10Ah
P = 10Ah
Offset
(P+1A)h
(P+1B)h
(P+1C)h
Offset
(P+1D)h
(P+1E)h
(P+1F)h
(P+10)h
(P+11)h
(P+12)h
(P+13)h
(P+14)h
(P+15)h
(P+16)h
(P+17)h
(P+18)h
(P+19)h
(P+20)h
(P+21)h
(P+22)h
(P+E)h
(P+F)h
(1)
(1)
Length
Length
10
1
4
1
1
1
1
1
1
Intel StrataFlash
Number of Protection register fields in JEDEC ID space.
Protection Field 1: Protection Description
Protection Field 2: Protection Description
Page Mode Read capability
bits 0–7 = “n” such that 2
Number of synchronous mode read configuration fields that
follow. 00h indicates no burst capability.
Synchronous mode read capability configuration 1
Synchronous mode read capability configuration 2
Synchronous mode read capability configuration 3
Synchronous mode read capability configuration 4
Order Number: 306666, Revision: 001
“00h,” indicates that 256 protection fields are available
This field describes user-available One Time Programmable
(OTP) Protection register bytes. Some are pre-programmed
with device-unique serial numbers. Others are user
programmable. Bits 0–15 point to the Protection register Lock
byte, the section’s first byte. The following bytes are factory
pre-programmed and user-programmable.
bits 0–7 = Lock/bytes Jedec-plane physical low address
bits 8–15 = Lock/bytes Jedec-plane physical high address
bits 16–23 = “n” such that 2
bits 24–31 = “n” such that 2
Bits 0–31 point to the Protection register physical Lock-word
address in the Jedec-plane.
Following bytes are factory or user-programmable.
read-page bytes. See offset 28h for device word width to
determine page-mode data output width. 00h indicates no
read page buffer.
Bits 3–7 = Reserved
bits 0–2 “n” such that 2
maximum number of continuous synchronous reads when
the device is configured for its maximum word width. A value
of 07h indicates that the device is capable of continuous
linear bursts that will output data until the internal burst
counter reaches the end of the device’s burstable address
space. This field’s 3-bit value can be written directly to the
Read Configuration Register bits 0–2 if the device is
configured for its maximum word width. See offset 28h for
word width to determine the burst data output width.
bits 32–39 = “n” ∴ n = factory pgm'd groups (low byte)
bits 40–47 = “n” ∴ n = factory pgm'd groups (high byte)
bits 48–55 = “n” \ 2n = factory programmable bytes/group
bits 56–63 = “n” ∴ n = user pgm'd groups (low byte)
bits 64–71 = “n” ∴ n = user pgm'd groups (high byte)
bits 72–79 = “n” ∴ 2
(Optional flash features and commands)
(Optional flash features and commands)
®
Embedded Memory (P30)
n
n
n+1
= user programmable bytes/group
Description
Description
HEX value represents the number of
HEX value represents the
n
n
= factory pre-programmed bytes
= user programmable bytes
Add. Code Value
11C:
11D:
Add. Code Value
12C:
11A:
11B:
11E:
11F:
12A:
12B:
118:
119:
120:
121:
122:
123:
124:
125:
126:
127:
128:
129:
Hex
Hex
--02
--80
--00
--03
--03
--89
--00
--00
--00
--00
--00
--00
--10
--00
--04
--03
--04
--01
--02
--03
--07
Datasheet
8 byte
8 byte
8 byte
Cont
80h
00h
89h
00h
00h
00h
16
16
16
2
4
4
8
0
0
0
0