AT17LV002 ATMEL Corporation, AT17LV002 Datasheet - Page 20

• Manufacturer Part Number: AT17LV002
• Description: FPGA Configuration EEPROM Memory
• Manufacturer: ATMEL Corporation

20J – PLCC
20
Notes:
R
AT17LV65/128/256/512/010/002/040
2325 Orchard Parkway
San Jose, CA 95131
1. This package conforms to JEDEC reference MS-018, Variation AA.
2. Dimensions D1 and E1 do not include mold protrusion.
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
0.51(0.020)MAX
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
45˚ MAX (3X)
1.14(0.045) X 45˚
B
TITLE
20J, 20-lead, Plastic J-leaded Chip Carrier (PLCC)
D1
D
PIN NO. 1
IDENTIFIER
e
E1
E
1.14(0.045) X 45˚
SYMBOL
D2/E2
A
A1
A2
D
D1
E
E1
B
B1
e
A
4.191
2.286
9.779
8.890
9.779
8.890
7.366
0.660
0.330
0.508
COMMON DIMENSIONS
MIN
B1
(Unit of Measure = mm)
A2
A1
0.318(0.0125)
0.191(0.0075)
1.270 TYP
D2/E2
NOM
–
–
–
–
–
–
–
–
–
–
DRAWING NO.
10.033
10.033
4.572
3.048
9.042
9.042
8.382
0.813
MAX
0.533
–
20J
2321E–CNFG–06/03
Note 2
Note 2
NOTE
10/04/01
REV.
B