TC94A04AFG Toshiba Semiconductor, TC94A04AFG Datasheet - Page 13
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TC94A04AFG
Manufacturer Part Number
TC94A04AFG
Description
1 CHIP AUDIO DIGITAL PROCESSOR
Manufacturer
Toshiba Semiconductor
Datasheet
1.TC94A04AFG.pdf
(42 pages)
- Current page: 13 of 42
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2.2.3 Setting RAM (ACMP mode)
to the interface buffer RAM (IFB-RAM). Then, all the data are updated together in a period of 1 fs.
applies to the K6 to K10 data.
Please set up again after initializing by RST terminal or the initialization command.
In ACMP mode, the TC94A04AFG/AFDG does not write data directly to coefficient RAM (CRAM) or offset RAM (OFRAM). In this mode, data must be written
For example, if a signal flow filter is designed as in the following diagram, unless the K1 to K5 data are batch-updated, the circuit may resonate. The same
Using ACMP mode can reduce the noise caused by updating coefficients while the TC94A04AFG/AFDG is operating.
IFB-RAM is 32-word memory. Therefore, data can be updated at one time in units of up to 32-words.
The length of the data field is 2 × n bytes, where n < = 32.
In addition, operation at the time of transmitting other commands, before package rewriting of the data by ACMP mode was completed cannot be guaranteed.
IFCK
IFDI
CS
(MCU → )
start
A7
A6
A5
A4
32h
A3
K1
K2
K3
A2
A1
+
A0
HZ
K4
K5
C7
C6
C5
K6
K7
K8
C4
C3
C2
+
C1
K10
K9
C0
HZ
RA15
RA14
RA13
RA12
RA11
RA10
Write one by one ・・・
RA9
13
RA8
MCU-I/F
HZ
RA7
RA6
RA5
RA4
RA3
RA2
RA1
IFB-RAM
RA0
HZ
D15
D14
D13
D12
D11
Update for 1 fs
D10
D9
Cn: COMMAND
An: I
RAn: RAM-ADDRESS
Dn: Data
CRAM
D8
HZ
2
C address
HZ
end
TC94A04AFG/AFDG
2005-09-28
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