TC94A04AFG Toshiba Semiconductor, TC94A04AFG Datasheet - Page 15

• Manufacturer Part Number: TC94A04AFG
• Description: 1 CHIP AUDIO DIGITAL PROCESSOR
• Manufacturer: Toshiba Semiconductor

Command-40h (0100 0000): TIMING (4400h*)
D15
D14
D13
D12
D11
D10
D15
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Bit
0
3.2
SYPD SYD1 SYD0
D14
EBCOS
ELROS
Control Commands Description
initial value at the time of reset.
Name
SYPD
SYPA
SYPS
SYD
SYA
SYS
[1:0]
[1:0]
[1:0]
[1:0]
⎯
⎯
⎯
⎯
Each command explanation is shown below. * mark in each command explanation table shows the
D13
Fixed to 0 (zero)
ASP digital block sync polarity
switching
ASP digital block SYNC signal
input switching
Fixed to 0 (zero)
DF block sync polarity
switching
DF block sync input switching
Fixed to 0 (zero)
SYNC circuit input polarity
switching (SYNC reference
signal)
SYNC circuit input switching
(SYNC reference signal)
Fixed to 0 (zero)
Select the clock at the time of
ELRI/O output
Select the clock at the time of
EBCI/O output
D12
Description
D11
0
SYPA
D10
SYA1
D9
Value
SYA0
1 *
0 *
1 *
0 *
0 *
0 *
0 *
0 *
⎯
⎯
⎯
⎯
0
1
2
3
0
1
2
3
1
1
2
3
1
1
2
3
D8
15
ASP program starts on falling edge
ASP program starts on rising edge
Signal after SYNC 1 fs output
Signal after SYNC 2 fs output 2 fs (for 96 kHz sampling)
SYNC pin
ELRI/O pin
DF-processing starts in a falling
DF-processing starts in a rising
SYNC 1 fs output
SYNC 2 fs output
Reserved
Reserved
Reference input = L Lch
Reference input = H Lch
Internal divided results
SYNC pin
ELRI/O pin
Output ELRI/O pin input divided by 2 (for 96 kHz sampling)
1 fs (Internal fs)
2 fs (Internal fs × 2)
32 fs (Internal fs × 32)
64 fs (Internal fs × 64)
128 fs (Internal fs × 128)
Reserved
D7
0
SYPS
D6
SYS1
D5
SYS0
D4
Operation
TC94A04AFG/AFDG
⎯
⎯
⎯
⎯
D3
0
ELROS
D2
2005-09-28
EBC-
OS1
D1
EBC-
OS0
D0