MCF5232 ETC, MCF5232 Datasheet - Page 3

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MCF5232

Manufacturer Part Number
MCF5232
Description
Integrated Microprocessor Hardware Specification
Manufacturer
ETC
Datasheet

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1.2
The superset device in the MCF523x family comes in a 256 mold array process ball grid array (MAPBGA)
package.
Freescale Semiconductor
Figure 1
Block Diagram
shows a top-level block diagram of the MCF5235, the superset device.
Instruction/Data Cache
Static RAM (SRAM)
Interrupt Controllers (INTC)
Edge Port Module (EPORT)
External Interface Module (EIM)
4-channel Direct-Memory Access
(DMA)
SDRAM Controller
Fast Ethernet Controller (FEC)
Cryptography - Security module for
data packets processing
Watchdog Timer (WDT)
Four Periodic Interrupt Timers (PIT)
32-bit DMA Timers
QSPI
UART(s)
I
FlexCAN 2.0B - Controller-Area
Network communication module
General Purpose I/O Module
(GPIO)
JTAG - IEEE 1149.1 Test Access
Port
Package
2
C
MCF523x Integrated Microprocessor Hardware Specification, Rev. 1.3
Table 1. MCF523x Family Configurations (continued)
Module
Preliminary
MAPBGA
160 QFP
5232
196
2
x
x
x
x
x
x
4
x
3
x
1
x
x
MAPBGA
5233
256
2
x
x
x
x
4
3
x
2
x
x
x
x
x
64 Kbytes
8 Kbytes
MAPBGA
5234
256
2
x
x
x
x
x
x
x
4
3
x
1
x
x
x
MAPBGA
5235
256
2
x
x
x
x
x
x
x
x
4
x
3
x
2
x
x
Overview
3

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