M306V5EESP Mitsubishi, M306V5EESP Datasheet - Page 122

• Manufacturer Part Number: M306V5EESP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
• Manufacturer: Mitsubishi

122
(2) I
The I
When transmit data is written into this register, it is transferred to the outside from bit 7 in synchroniza-
tion with the SCL clock, and each time one-bit data is output, the data of this register are shifted one bit
to the left. When data is received, it is input to this register from bit 0 in synchronization with the SCL
clock, and each time one-bit data is input, the data of this register are shifted one bit to the left.
The I
is “1.” The bit counter is reset by a write instruction to the I
bit and the MST bit of the I
data shift register. Reading data from the I
ESO bit value.
The I
register before RESTART condition generation. That is, in master, transmit data written to the I
transmit buffer register is written to the I
output. The I
the I
Notes 1: To write data into the I
2
Ci data shift register, I
2
2
2
2
Ci transmit buffer register is disabled regardless of the ESO bit value.
Ci data shift register is in a write enable status only when the ESO bit of the I
Ci transmit buffer register is a register to store transmit data (slave address) to the I
Ci data shift register is an 8-bit shift register to store receive data and write transmit data.
2: To generate START/RESTART condition after the I
bit value changes from “1” to “0” (slave mode), keep an interval of 20 BCLK or more.
buffer register is written, keep an interval of 2 BCLK or more.
2
Ci transmit buffer register can be written only when the ESO bit is “1,” reading data from
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
2
2
Ci status register are “1,” the SCL is output by a write instruction to the I
Ci transmit buffer register (i = 0, 1)
2
Ci data shift register or the I
2
Ci data shift register simultaneously. However, the SCL is not
2
Ci data shift register is always enabled regardless of the
2
Ci data shift register. When both the ESO
2
2
Ci transmit buffer register after the MST
Ci data shift register or the I
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
2
Ci control register
2
Ci data shift
2
Ci transmit
Rev. 1.0
2
2
Ci
Ci