M306V5EESP Mitsubishi, M306V5EESP Datasheet - Page 241
M306V5EESP
Manufacturer Part Number
M306V5EESP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
Manufacturer
Mitsubishi
Datasheet
1.M306V5EESP.pdf
(262 pages)
- Current page: 241 of 262
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Rev. 1.0
3.9 Interrupts
(1) Reading address 00000
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled, the
(2) Setting the stack pointer
(3) External interrupt
(4) Rewrite the interrupt control register
interrupt request bit is not set sometimes even if the interrupt request for that register has been gener-
ated. This will depend on the instruction. If this creates problems, use the below instructions to change
the register.
Instructions : AND, OR, BCLR, BSET
• When maskable interrupt is occurred, CPU read the interrupt information (the interrupt number
• The value of the stack pointer immediately after reset is initialized to 0000
• When the polarity of the INT
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt
and interrupt request level) in the interrupt sequence.
The interrupt request bit of the certain interrupt written in address 00000
Reading address 00000
“0”.
Though the interrupt is generated, the interrupt routine may not be executed.
Do not read address 00000
interrupt before setting a value in the stack pointer may become a factor of runaway. Be sure to
set a value in the stack pointer before accepting an interrupt.
to “1.” After changing the polarity, set the interrupt request bit to “0.”
request for that register. If there is possibility of the interrupt request occur, rewrite the interrupt
control register after the interrupt is disabled. The program examples are described as follow:
Example 1:
Example 2:
Example 3:
The reason why two NOP instructions or dummy read are inserted before FSET I in Examples 1 and 2 is
to prevent the interrupt enable flag I from being set before the interrupt control register is rewritten due to
effects of the instruction queue.
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM, R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
I
#00h, 0055h
I
I
#00h, 0055h
I
I
#00h, 0055h
FLG
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
16
16
_______
by software sets enabled highest priority interrupt source request bit to
16
0
and INT
by software.
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Enable interrupts.
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Dummy read.
; Enable interrupts.
; Push Flag register onto stack
; Disable interrupts.
; Clear TA0IC int. priority level and int. request bit.
; Enable interrupts.
_______
1
pins is changed, the interrupt request bit is sometimes set
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
16
will then be set to “0”.
16
M306V5EESP
. Accepting an
241
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