M306V5EESP Mitsubishi, M306V5EESP Datasheet - Page 25
M306V5EESP
Manufacturer Part Number
M306V5EESP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
Manufacturer
Mitsubishi
Datasheet
1.M306V5EESP.pdf
(262 pages)
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Rev. 1.0
Table 2.4.1 Software waits and bus cycles
2.4.1 Software Wait
ROM/RAM
OSD RAM
Internal
A software wait can be inserted by setting the wait bit (bit 7) of processor mode register 1 (address
0005
A software wait is inserted in the internal ROM/RAM area by setting the wait bit of the processor mode
register 1. When set to “0”, each bus cycle is executed in one BCLK cycle. When set to “1”, each bus cycle
is executed in two BCLK cycles. After the microcomputer has been reset, this bit defaults to “0”.
The SFR area and the OSD RAM area is always accessed in two BCLK cycles regardless of the setting
of these control bits.
Table 2.4.1 shows the software wait and bus cycles. Figure 2.4.4 shows example bus timing when using
software waits.
SFR/
Area
16
).
Wait bit
Invalid
0
1
2 BCLK cycles
1 BCLK cycle
2 BCLK cycles
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
Bus cycle
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
25
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