UPD17073 NEC, UPD17073 Datasheet - Page 125
UPD17073
Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet
1.UPD17073.pdf
(226 pages)
- Current page: 125 of 226
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14.10 Status on Reset
14.10.1 At power-ON reset
14.10.2 At clock stop
14.10.3 At CE reset
14.10.4 In halt status
P0B2/SCK and P0B3/SI/SO1 pins are set in the general-purpose input port mode.
P1C0/SO0 pin is set in the general-purpose port.
The contents of the presettable shift register are undefined.
P0B2/SCK and P0B3/SI/SO1 pins set in the general-purpose input port mode.
P1C0/SO0 pin is set in the general-purpose port.
The previous contents of the presettable shift register are retained.
P0B2/SCK and P0B3/SI/SO1 pins are set in the general-purpose input port mode.
P1C0/SO0 pin is set in the general-purpose port.
The previous contents of the presettable shift register are retained.
All the pins hold the current status.
The internal clock stops output in the status in which the HALT instruction is executed.
When the external clock is used, the operation continued even if the HALT instruction is executed.
PD17072,17073
125
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