UPD17073 NEC, UPD17073 Datasheet - Page 129
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UPD17073
Manufacturer Part Number
UPD17073
Description
4-BIT SINGLE-CHIP MICROCONTROLLER WITH HARDWARE FOR DIGITAL TUNING SYSTEM
Manufacturer
NEC
Datasheet
1.UPD17073.pdf
(226 pages)
- Current page: 129 of 226
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15.2.2
(1) Direct division mode (MF)
(2) Pulse swallow mode (HF)
(3) Pulse swallow mode (VHF)
(4) PLL disable
In this mode, the VCOL pin is used.
The VCOH pin is floated.
The frequency of the input signal is divided only by the programmable counter in this mode.
The VCOL pin is used, and the VCOH pin is floated.
In this mode, the frequency is divided by the swallow counter and programmable counter.
The VCOH pin is used, and the VCOL pin is floated. If this mode is selected 1/2 division is inserted in the stage
previous to programmable divider.
In this mode, the swallow counter and programmable counter are used for frequency division.
Refer to 15.5 PLL Disable Status.
Outline of each division mode
PD17072,17073
129
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