HYS64-74V8200GU Siemens, HYS64-74V8200GU Datasheet - Page 11

• Manufacturer Part Number: HYS64-74V8200GU
• Description: 3.3 V 8M x 64/72-Bit 1 Bank SDRAM Module 3.3 V 16M x 64/72-Bit 2 Bank SDRAM Module
• Manufacturer: Siemens

Notes
1. The specified values are valid when addresses are changed no more than once during
2. The specified values are valid when data inputs (DQ’s) are stable during
3. All AC characteristics are shown for device level.
4. AC timing tests have
.
5. If clock rising time is longer than 1ns, a time (
6. Rated at 1.5 V
7. If
8. Any time that the refresh Period has been exceeded, a minimum of two Auto (CBR) Refresh
9. Self Refresh Exit is a synchronous operation and begins on the 2nd positive clock edge after
10.Referenced to the time which the output achieves the open circuit condition, not to output voltage
Semiconductor Group
and when No Operation commands are registered on every rising clock edge during
Values are shown per module bank.
An initial pause of 100 s is required after power-up, then a Precharge All Banks command must
be given followed by 8 Auto Refresh (CBR) cycles before the Mode Register Set Operation can
begin.
point. The transition time is measured between
t
with a 50 pF only, without any resistive termination and with a input signal of 1V/ns edge rate
between 0.8 V and 2.0 V.
commands must be given to “wake-up“ the device.
CKE returns high. Self Refresh Exit is not complete until a time period equal to
once the Self Refresh Exit command is registered.
levels.
T
t
= 1 ns with the AC output load circuit show. Specified
CLOCK
INPUT
OUTPUT
T
is longen than 1 ns, a time (
t
SETUP
t
HOLD
t
LZ
V
IL
t
AC
= 0.4 V and
1.4 V
t
CL
t
T
– 1) ns has to be added to this parameter.
V
IH
t
t
OH
CH
t
= 2.4 V with the timing referenced to the 1.4 V crossover
T
t
t
AC
HZ
11
2.4 V
0.4 V
t
T
/2 – 0.5) ns has to be added to this parameter.
SPT03404
V
HYS 64(72)V8200/16220GU-8/-10
IH
1.4 V
and
t
AC
V
IL
and
. All AC measurements assume
Measurement conditions for
I/O
t
OH
parameters are measured
t
AC
SDRAM Modules
and
t
RC(MIN.)
t
OH
50 pF
.
t
RC
1998-08-01
is satisfied
t
RC(MIN.)
t
CK(MIN.)
.