BS62LV4006ECG70 BSI [Brilliance Semiconductor], BS62LV4006ECG70 Datasheet
![no-image](/images/no-image-200.jpg)
BS62LV4006ECG70
Available stocks
Related parts for BS62LV4006ECG70
BS62LV4006ECG70 Summary of contents
Page 1
Very Low Power CMOS SRAM 512K X 8 bit Pb-Free and Green package materials are compliant to RoHS FEATURES Wide V operation voltage : 2.4V ~ 5.5V CC Very low power consumption : V = 3.0V Operation current : 30mA ...
Page 2
PIN DESCRIPTIONS Name A0-A18 Address Input CE Chip Enable Input WE Write Enable Input OE Output Enable Input DQ0-DQ7 Data Input/Output Ports V CC GND TRUTH TABLE CE MODE Not selected H (Power Down) Output Disabled Read Write ABSOLUTE MAXIMUM ...
Page 3
DC ELECTRICAL CHARACTERISTICS (T PARAMETER PARAMETER NAME V Power Supply CC V Input Low Voltage IL V Input High Voltage IH I Input Leakage Current IL I Output Leakage Current LO V Output Low Voltage OL V Output High Voltage ...
Page 4
AC TEST CONDITIONS (Test Load and Input/Output Reference) Input Pulse Levels Input Rise and Fall Times Input and Output Timing Reference Level CLZ OLZ CHZ OHZ WHZ Output Load Others V ...
Page 5
SWITCHING WAVEFORMS (READ CYCLE) (1,2,4) READ CYCLE 1 ADDRESS D OUT (1,3,4) READ CYCLE OUT (1, 4) READ CYCLE 3 ADDRESS OUT NOTES high in read Cycle. 2. Device is continuously ...
Page 6
AC ELECTRICAL CHARACTERISTICS (T WRITE CYCLE JEDEC PARANETER PARAMETER NAME NAME t t Write Cycle Time AVAX Chip Select to End of Write E1LWH Address Set up Time AVWL Address Valid ...
Page 7
WRITE CYCLE 2 ADDRESS OUT D IN NOTES must be high during address transitions. 2. The internal write time of the memory is defined by the overlap of CE and WE low. All signals ...
Page 8
ORDERING INFORMATION BS62LV4006 Note: BSI (Brilliance Semiconductor Inc.) assumes no responsibility for the application or use of any product or circuit described herein. BSI does not authorize its products for use as critical components in any application in which the ...
Page 9
PACKAGE DIMENSIONS (continued) STSOP - 32 TSOP - 32 R0201-BS62LV4006 9 BS62LV4006 Revision 1.5 Oct. 2008 ...
Page 10
PACKAGE DIMENSIONS (continued) PDIP - 32 R0201-BS62LV4006 10 BS62LV4006 Revision 1.5 Oct. 2008 ...
Page 11
PACKAGE DIMENSIONS (continued SEATING PLANE -T- RAD R GAGE PLANE L RAD R1 L2 DETAIL "X" TSOP R0201-BS62LV4006 "X" NOTE: 1. CONTROLLING DIMENSION : MILLIMETERS. 2. ...
Page 12
Revision History Revision No. History 1.2 To add Icc1 characteristic parameter To improve Iccsb1 spec. I-grade from 60uA to 20uA at 5.0V C-grade from 30uA to 10uA at 5.0V 1.3 To Add 400 mil TSOP II package type 1.4 Change ...