S3062TB21 AMCC (Applied Micro Circuits Corp), S3062TB21 Datasheet
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S3062TB21
Manufacturer Part Number
S3062TB21
Description
Manufacturer
AMCC (Applied Micro Circuits Corp)
Datasheet
1.S3062TB21.pdf
(2 pages)
Specifications of S3062TB21
Package
BGA
Date_code
09+
AMCC: MyAMCC
https://www.amcc.com/MyAMCC/jsp/public/productDetail/product_detail.jsp?productID=S3062 (1 of 2)10/19/2006 9:53:04 AM
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Oct 19, 2006
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S3062
Multi-Rate Performance Monitor with Forward Error Correction
Product Status: Production Release
S3062 - Multi-Rate Performance Monitor
Features
Single 3.3 V supply
352-pin SBGA (Super Ball Grid Array) package
Bellcore, ITU-T and IEEE compliant
Functions with AMCC MUX/DeMUX chipsets
Provides a 16 bit input and a 16 bit output single-ended PECL data path
Provides a FPGA interface for SONET/SDH overhead insertion/extraction as well as PM count
retrieval
Provides a micro processor interface for register access as well as SONET/SDH overhead insertion/
extraction
Provides optional Reed Solomon encoding of data for Forward Error Correction (FEC)
Provides optional Reed Solomon decoding of data for Forward Error Correction (FEC)
Optionally differentially decodes and encodes incoming and outgoing data
Provides on-chip clock dividers to simplify external clock generation for Forward Error Correction
(FEC)
Extracts and optionally inserts SONET/SDH overhead bytes via an MPC860 microprocessor port
Extracts and optionally inserts SONET/SDH overhead bytes via a 21 bit FPGA port
Extracts and optionally inserts orderwire bytes (E1 and E2) via serial I/O
Extracts and optionally inserts the data communication channels (D1-3 and D4-12) via serial I/O
Performs frame and byte alignment and outputs frame pulses
Performs optional frame-synchronous scrambling and descrambling
Monitors FEC data for total corrected bit errors, corrected ones, corrected zeros, corrected bytes, and
uncorrectable blocks
Monitors for Loss of Signal and outputs alarm (LOS)
Monitors for Out of Frame and outputs alarm (OOF)
Monitors for Loss of Frame and outputs alarm (LOF)
Monitors J0 byte for section trace messages
Monitors B1 byte for Bit Interleave parity errors and outputs error indications (B1ERR) Monitors B2
byte for Bit interleave parity errors, Signal Degrade (SD) and Signal Fail (SF)
Monitors K1, K2 bytes for Automatic Protection Switching (APS) changes, line AIS and line RDI
Monitors the S1 byte for mismatches and inconsistent values
Monitors the M1 byte for Remote Error Indications (REI)
Monitors for Gigabit Ethernet Loss of Synchronization (LOS), 8B/10B code violations, and disparity
errors
Optionally provides a data link in the FEC framing bytes for transmission of messages, error
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