ZL30461MGG ZARLINK [Zarlink Semiconductor Inc], ZL30461MGG Datasheet - Page 14

• Manufacturer Part Number: ZL30461MGG
• Description: COMPACT STRATUM 3 TIMING MODULE
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

After initiating a reference realignment the ZL30461 will enter Holdover Mode for 200 ns while aligning the internal
clocks to remove the static phase error. The ZL30461 will then begin the normal locking procedure. The LOCK pin
will remain high during the realignment process.
For 1.5 Hz filtering applications (FCS=0, FCS2=0)
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•
•
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After initiating a reference realignment the ZL30461 will enter Holdover Mode for 200 ns while aligning the internal
clocks to remove the static phase error. The ZL30461 will then begin the normal locking procedure. The LOCK pin
will remain high during the realignment process.
For 6 Hz and 12 Hz filtering applications (FCS=1, FCS2=1 or FCS=0, FCS2=1)
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•
•
•
After initiating a reference realignment the ZL30461 will enter Holdover Mode for 200 ns while aligning the internal
clocks to remove the static phase error. The ZL30461 will then begin the normal locking procedure. The LOCK pin
will remain high during the realignment process.
1.4
The ZL30461 has multiple clock outputs, from the Clock Synthersizer and the Jitter Attenuator. The very low jitter
output clocks of the 19.44 MHz and 77.76 MHz are used for the backplane clocks and the high speed optical
framers and physical interfaces
1.4.1
The output of the Core PLL is connected to the Clock Synthesizer that generates 12 clocks and three frame pulses.
1.4.2
The ZL30461 output driver circuit provides a jitter attenuated output at 77.76 MHz with less than 40 ps jitter
performance. This output must be terminated correctly and failure to do so will affect the modules performance. The
recommend termination for this output is shown in Figure 3.
In addition to the 77.76 MHz output, the ZL30461 also provides a 19.44 MHz jitter attenuated output.
Wait until the ZL30461 LOCK indicator is high, indicating that it is locked
Pull RefAlign low
Hold RefAlign low for 10 sec
Pull RefAlign high
Wait until the ZL30461 LOCK indicator is high, indicating that it is locked
Pull RefAlign low
Hold RefAlign low for 3 sec
Pull RefAlign high
Output Clocks
Clock Synthesizer
Jitter Attenuator
Zarlink Semiconductor Inc.
ZL30461
14
Data Sheet