ZL50070GAC ZARLINK [Zarlink Semiconductor Inc], ZL50070GAC Datasheet - Page 41

• Manufacturer Part Number: ZL50070GAC
• Description: 24 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 96 Inputs and 96 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

14.3.2
There are a total of 96 Bit Error Counters, corresponding to the 96 serial input streams. Each count value is 32 bits
wide, but only the least significant 16 bits are used. The most significant 16 bits of the bit error counters will always
read back zero. A write operation to any byte of the counter, including the 16 most significant bits, will clear that
counter.
Each bit error counter contains the number of single bit errors detected on the corresponding stream, since the
counter was last cleared. If the number of bit errors detected exceeds 65,535 (decimal), the counter will hold that
value until it is cleared.
Table 22 - BER Enable Control Memory Stream Address Offset at Various Output Rates (continued)
BER Input Group
Input Group Data Rate
BER Counters
23
0
1
2
.
.
.
8 Mbps
Table 23 - BER Counter Group and Stream Address Mapping
BER Input Stream
Time-slot Range
STiA23
STiB23
STiC23
STiD23
STiC0
STiD0
STiC1
STiD1
STiC2
STiD2
STiA0
STiB0
STiA1
STiB1
STiA2
STiB2
.
.
.
0 - 127
Zarlink Semiconductor Inc.
ZL50070
41
Input Streams
Start Address (Hex)
STiAn
STiBn
STiCn
STiDn
400DC
401DC
4005C
4015C
40000
40080
40100
40180
40004
40084
40104
40184
40008
40088
40108
40188
.
.
.
Address Offset Range (Hex)
00080 - 000FF
00180 - 001FF
00000 - 0007F
00100 - 0017F
End Address (Hex)
400DF
401DF
4000B
4008B
4010B
4018B
4005F
4015F
40003
40083
40103
40183
40007
40087
40107
40187
.
.
.
Data Sheet