ZL50070GAC ZARLINK [Zarlink Semiconductor Inc], ZL50070GAC Datasheet - Page 56
![no-image](/images/no-image-200.jpg)
ZL50070GAC
Manufacturer Part Number
ZL50070GAC
Description
24 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 96 Inputs and 96 Outputs
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50070GAC.pdf
(66 pages)
- Current page: 56 of 66
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AC Electrical Characteristics - Output Clock Jitter Generation
Note 1:
Note 2:
No.
1
2
3
4
CKi at 8 MHz, output clock source set to internal APLL. No jitter presented on the Cki0 input.
For 65.536 MHz output clock, the total loading on the output should not be larger than 10pF.
Output Frame Boundary
Output Frame Boundary
Jitter at CKO0-3 (8.192 MHz)
Jitter at CKO0-3 (16.384 MHz)
Jitter at CKO0-3 (32.768 MHz)
Jitter at CKO0-3 (65.536 MHz)
FPo0-3
CKo0-3
FPo0-3
CKo0-3
Figure 14 - ST-Bus Frame Pulse and Clock Output Timing
Characteristic
t
t
FPOS
FPOS
Figure 15 - GCI Frame Pulse and Clock Output Timing
t
t
FPOH
FPOH
Zarlink Semiconductor Inc.
ZL50070
56
1050
1030
Max.
920
810
t
t
CKOP
CKOP
Units
ps-pp
ps-pp
ps-pp
ps-pp
Notes
Data Sheet
1,2
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