ZL50070GAC ZARLINK [Zarlink Semiconductor Inc], ZL50070GAC Datasheet - Page 9

• Manufacturer Part Number: ZL50070GAC
• Description: 24 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps), and 96 Inputs and 96 Outputs
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Pin Description
G15, H6, H10, H13, H16, J7,
F9, F12, F15, G6, G10, G13,
P12, P13, P14, R8, R9, R12,
F7, F10, F13, F17, G9, G12,
J10, J11, J12, J13, J14, J16,
K7, K9, K10, K11, K12, K13,
A2, E5, C1, C2, H2, H1, M1,
T10, T16, U7, U9, U12, U15
P2, R5, V2, T5, Y3, W6, V8,
N8, N15, P6, P16, P17, R7,
F6, F16, G7, G8, G11, G14,
G17, H8, H9, H12, H15, J9,
N6, N7, N9, N10, N11, N12,
M11, M12, M13, M14, M16,
E7, C3, G4, J5, K6, J1, M2,
Y8, AB9, AA11, AB15, V15,
K8, K15, K17, L6, L16, M7,
K14, L8, L9, L10, L11, L12,
AA5, W9, AA9, U11, AA14,
G16, H7, H11, H14, J6, J8,
J15, J17, K16, L7, M6, M8,
R15, R16, T2, T7, T8, T11,
Y18, Y19, AB22, Y22, R20
P1, P4, W1, U4, W4, AB2,
P15, R6, R11, R14, R17,
N13, N14, P9, P10, P11,
R10, R13, T9, T12, T15,
L13, L14, L15, M9, M10,
M15, M17, N16, P7, P8,
Y16, AB20, V17, AA21,
T13, T14, T17, U6
U10, U13, U17
W21, V22
Pin
V
STiA0-23
STiB0-23
DD_CORE
V
Name
DD_IO
V
SS
Zarlink Semiconductor Inc.
Power Supply for the Core Logic: +1.8 V
Power Supply for the I/O: +3.3 V
Ground
Serial TDM Input Data ’A’ Streams (5 V Tolerant Input with
Internal Pull-down)
The data rate of these input streams can be selected in a group of 4
to be either 8.192 Mbps, 16.384 Mbps, 32.678 Mbps or
65.536 Mbps. Refer to Section 1.5 for rate programming
The data streams can be selected to be either inverted or
non-inverted, programmed by the Group Control Registers, see
Section 14.4.
Unused inputs are pulled low by internal pull-down resistors and
may be left unconnected.
Serial TDM Input Data ’B’ Streams (5 V Tolerant Input with
Internal Pull-down)
The data rate of these input streams can be selected in a group of 4
to be either 8.192 Mbps, 16.384 Mbps or 32.678 Mbps. The stream
is unused when its input group rate is 65.536 Mbps. Refer to
Section 1.5 for rate programming
The data streams can be selected to be either inverted or
non-inverted, programmed by the Group Control Registers (Section
14.4).
Unused inputs are pulled low by internal pull-down resistors and
may be left unconnected.
TDM Interface
ZL50070
9
Description
options.
Data Sheet
options.