ZL50073GAC ZARLINK [Zarlink Semiconductor Inc], ZL50073GAC Datasheet - Page 44

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ZL50073GAC

Manufacturer Part Number
ZL50073GAC
Description
32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps)
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
31 - 23
21 - 20
19 - 18
17 - 16
31
15
External Read/Write Address: 40200
Reset Value: 000C000C
0
0
Bit
22
30
14
0
0
OSSRC1 - 0
OSBA1 - 0
OSBR1 - 0
29
13
0
0
Unused
Name
OSI
28
12
0
0
H
27
11
0
0
Reserved. In normal functional mode, these bits MUST be set to zero.
Output Stream Invert
For normal operation, this bit is set low.
To invert the output stream, set this bit high.
Output Stream Bit Advancement
Output Stream Bit Rate
Unused streams are tri-stated.
If the internal system clock is used as the clock source, all the above data rates are
available. Otherwise, the data rate cannot exceed the selected clock source’s rate.
Output Stream Clock Source Select
26
10
0
0
H
OSBR1 - 0
OSBA1 - 0
OSSRC1 - 0
- 4027F
25
00
01
10
00
01
10
ISI
11
11
0
9
00
01
10
11
Table 25 - Group Control Register
H
ISPD
24
8
0
4
Zarlink Semiconductor Inc.
16.384 Mbps
32.768 Mbps
65.536 Mbps
8.192 Mbps
STi/oA
ISPD
ZL50073
23
0
7
3
Internal System Clock
Output Timing Source
44
Non-65 Mbps
CKi0 and FPi0
CKi1 and FPi1
CKi2 and FPi2
ISPD
OSI
22
6
15.2 ns
22.8 ns
2
7.6 ns
0 ns
16.384 Mbps
32.768 Mbps
8.192 Mbps
Description
OSBA 1 OSBA 0 OSBR 1
Not Used
ISPD
STi/oB
21
5
1
Bit Rates Per Group
ISPD
20
4
0
ISBR
16.384 Mbps
8.192 Mbps
19
3
1
Not Used
Not Used
STi/oC
OSBR 0
ISBR
18
2
0
65 Mbps
11.4 ns
3.8 ns
7.6 ns
0 ns
OSSRC 1
ISSRC
16.384 Mbps
8.192 Mbps
17
1
1
Not Used
Not Used
STi/oD
Data Sheet
OSSRC 0
ISSRC
16
0
0

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