ZL50073GAC ZARLINK [Zarlink Semiconductor Inc], ZL50073GAC Datasheet - Page 58

• Manufacturer Part Number: ZL50073GAC
• Description: 32 K Channel Digital Switch with High Jitter Tolerance, Rate Conversion per Group of 4 Streams (8, 16, 32 or 64 Mbps)
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

AC Electrical Characteristics
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
No.
10
11
12
1
2
3
4
5
6
7
8
9
Characteristics are over recommended operating conditions unless other wise stated.
All of these specifications refer to ST-BUS inputs and outputs with clock source set to CKi.
Typical figures are at 25°C, V
Loads on all serial outputs set to 30 pF.
High Impedance is measured by pulling to the appropriate rail with R
subject to production testing.
C
CKi to CKo Positive edge
Propagation Delay
CKi to CKo Negative edge
Propagation Delay
STi to posedge CKi setup
STi to posedge CKi hold
STi to negedge CKi setup
STi to negedge CKi hold
Posedge CKi to Output Data Valid
Negedge CKi to Output Data Valid
Posedge CKi to Output Data
tri-state
Negedge CKi to Output Data
tri-state
ODE to Output Data tri-state
ODE to Output Data Enable
L
.
Characteristic (Figure )
1
- Serial Data Timing
DD_CORE
at 1.8 V and V
Zarlink Semiconductor Inc.
t
t
Sym.
t
t
t
t
t
t
t
CKDN
t
t
CKDP
t
SIPH
SINS
SINH
SINV
SIPS
SIPV
SIPZ
SINZ
SOZ
SOE
ZL50073
2
DD_IO
to CKi
58
Min.
-0.8
-0.8
3.5
4.1
4.5
5.9
5.9
4.8
4.1
5.8
4.5
4.3
4.6
5.3
5.7
4.5
at 3.3 V and are for design aid only: not guaranteed and not
5
6
Typ.
L
, with timing corrected to cancel time taken to discharge
3
Max.
10.1
13.7
12.9
14.8
14.6
14.5
13.6
11.6
9.2
9.2
13
10
15
20
11
8
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CKo clock source =
CKi
CKo Clock source =
Internal 131 MHz
APLL output
CKo clock source =
CKi
CKo Clock source =
Internal 131 MHz
APLL output
SToA
SToB, C, D
SToA
SToB, C, D
SToA
SToB, C, D
SToA
SToB, C, D
SToA
C
SToB, C, D
C
SToA
SToB, C, D
L
L
= 30 pF, R
= 30 pF, R
5
5
5
5
5
Notes
Data Sheet
5
5
5
5
5
4
L
L
= 1K
= 1K
5
5