AM79C984AKCW AMD [Advanced Micro Devices], AM79C984AKCW Datasheet - Page 21
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AM79C984AKCW
Manufacturer Part Number
AM79C984AKCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C984AKCW.pdf
(44 pages)
- Current page: 21 of 44
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Control Functions
The eIMR device receives control commands in the
form of byte-length data on the serial input pin, SI. If the
eIMR device is expected to provide data in response to
the command, it will send byte-length data to the serial-
output pin, SO. Both the input and output data streams
are clocked with the rising edge of the SCLK signal.
The byte-length data is in RS232 serial-data format;
that is, one start bit followed by eight data bits. The ex-
ternally generated clock at the SCLK pin may be either
V
DD
1k
SELI_0
SELI_1
SELI_0
SELI_1
SELI_0
SELI_1
SELI_0
SELI_1
SELO
SELO
SELO
SELO
Figure 5. Internal Arbitration—eIMR Devices in Cascade
P R E L I M I N A R Y
Am79C984A
SELI_0
SELI_1
SELI_0
SELI_1
a free-running clock synchronized to the input bit pat-
terns, or a series of individual transitions meeting the
setup-and-hold times with respect to the input bit pat-
tern. If the latter method is used, 20 SCLK clock transi-
tions are required for control commands that produce
SO data, and 14 SCLK clock transitions are required
for control commands that do not produce SO data.
SELO
SELO
SELI_0
SELI_1
20650A-10
SELO
20650B-10
21
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