AM79C984AKCW AMD [Advanced Micro Devices], AM79C984AKCW Datasheet - Page 24

• Manufacturer Part Number: AM79C984AKCW
• Manufacturer: AMD [Advanced Micro Devices]

SET (Write Commands)
Chip Programmable Option
SI Data
SO Data
The eIMR chip programmable option can be enabled
(or disabled) by setting (or resetting) the S bit in the
command string.
S
Setting this bit allows the eIMR chip to ignore activity on
the CI signal pair, during the SQE test window, following
a transmission on the AUI port. Enabling this function
does not prevent the reporting of this condition by the
eIMR device. The two functions operate independently.
The SQE Test Window, as defined in IEEE 802.3 (Sec-
tion 7.2.2.2.4) is from 6 bit times to 34 bit times (0.6 s
to 3.4 s). This includes the delay introduced by a 50-
meter AUI. CI activity that occurs outside this window is
not ignored and is treated as a true collision.
Alternate AUI Partitioning Algorithm
SI Data
SO Data
Invoking this command sets the partition/reconnection
scheme for the AUI port to the alternate (transmit-only)
reconnection algorithm. To return the AUI port to the
standard (transmit or receive) reconnection algorithm,
it is necessary to reset the eIMR device. The standard
partitioning algorithm is selected on reset.
Alternate TP Partitioning Algorithm
SI Data
SO Data
Invoking this command sets the partition/reconnection
scheme for the TP ports to the alternate (transmit-only)
reconnection algorithm. To return the TP ports to the
standard (transmit or receive) reconnection algorithm,
it is necessary to reset the eIMR device. The standard
partitioning algorithm is selected on reset.
AUI Port Disable
SI
SO Data
This command disables the AUI port. Subsequently, the
eIMR chip will ignore all inputs to this port and will not
transmit a DAT or JAM pattern on the AUI port. Disabling
the AUI port also sets the partitioning state machine of
the AUI port to the idle state. Therefore, a partitioned
port can be reconnected by first disabling the AUI port
and then enabling the AUI port.
24
AUI SQE Test Mask
0000 10S0
None
0001 1111
None
0001 0000
None
0010 1111
None
P R E L I M I N A R Y
Am79C984A
AUI Port Enable
SI
SO Data
This command enables the AUI port.
TP Port Disable
SI Data
SO Data
This command disables the TP port designated by the
two least-significant bits of the command byte. Subse-
quently, the eIMR chip will ignore all inputs to the des-
ignated port and will not transmit a DAT or JAM pattern
on that port. Disabling the TP port also sets the parti-
tioning state machine of that port to the idle state. There-
fore, a partitioned port can be reconnected by first
disabling the port and then enabling it.
TP Port Enable
SI Data
SO Data
This command enables the TP port designated by the
two least-significant bits of the command byte.
Disable Link Test Function (Per TP port)
SI Data
SO Data
This command disables the Link Test function of the TP
port designated by the two least-significant bits of the
command data. As a consequence of this, the port will
no longer be disconnected if it fails the Link Test. If a
port has the Link Test disabled, reading the Link Test
Status indicates a ‘Link Pass’.
Enable Link Test Function (Per TP port)
SI Data
SO Data
This command enables the Link Test function of the TP
port designated by the two least-significant bits of the
command data. As a consequence of this, the port is
disconnected if it fails the Link Test.
Disable Link Pulse (Per TP Port)
SI Data
SO Data
This command disables the transmission of the Link
pulse on the TP port designated by the two least-
significant bits of the command byte.
Enable Link Pulse (Per TP Port)
SI Data
SO Data
This command enables the transmission of the Link
pulse on the TP port designated by the two least-
significant bits of the command byte.
0011 1111
None
0010 00##
None
0011 00##
None
0100 00##
None
0101 00##
None
0100 10##
None
0101 10##
None