AM79C984AKCW AMD [Advanced Micro Devices], AM79C984AKCW Datasheet - Page 26

• Manufacturer Part Number: AM79C984AKCW
• Manufacturer: AMD [Advanced Micro Devices]

Enable Software Override of Bank B LEDs (Per Port -
AUI and TP, Global)
SI Data
SO Data
This command forces the LEDs in Bank B to blink. In-
dividual LEDs and combinations of LEDs can be select-
ed via the lower four bits of the command byte as follows:
The designated LED driver(s) will switch between LOW
and ‘off’ at the rate set by the Software Override of LED
Blink Rate command. Enable Software Override of
Bank B LEDs references the blink rate last issued and
overrides any other attribute specified by LDC
ware Override of LEDs is disabled after reset.
Software Override of LED Blink Rate
SI Data
SO Data
This command sets the blink period of the LEDs with
Software Override enabled. The duty cycle is 50%. This
command defaults to ‘off’ at reset.
These settings apply to the blink rate for both Bank A
and Bank B. This command must precede the Enable
Software Override of Bank A/B LEDs command. All LED
combinations selected for Software Override will refer-
ence the blink rate last issued.
GET (Read Commands)
AUI Port(s) Status
SI Data
SO Data
The combined AUI status of the eIMR device allows a
single instruction to be used to monitor the AUI port.
The four local status bits are:
P
This bit is ‘0’ if the AUI port is partitioned and ‘1’ if the
AUI port is connected.
26
Partitioning Status
####
0000-0011 TP0 - TP3
0100-0111 Reserved
1000
1001
1010
1011
1100
1101
1110
1111
Setting
1110 1000
1110 1001
1110 1010
1110 1011
1100 ####
None
Port(s) affected
AUI port
Reserved
Reserved
All TP ports
All ports
Global
Reserved
Reserved
1110 1###
None
1000 1111
PBSL 0000
Blink Period
Off
512 ms
1560 ms
Solid On
P R E L I M I N A R Y
0-2
. Soft-
Am79C984A
B
This bit is set to ‘1’ if there is an instance of FIFO overflow
or underflow. The bit is cleared when the eIMR device
is read.
S
This bit is set to ‘1’ if the SQE test error is detected by
the eIMR chip. The bit is cleared when the status is read.
L
The MAU attached to the AUI port is required to loop-
back data transmitted to DO onto the DI circuit. If the
loopback carrier is not detected by the eIMR device, this
bit is set to ‘1’. This bit is cleared when the status is read.
Alternate AUI Port(s) Status
There are three further variations of the AUI Port Status
Command allowing selective clearing of a combination
of B,S, and L bits. These are the following:
Alternate 1: B is not cleared, S and L are Cleared
SI Data
SO Data
Alternate 2: S and L are not cleared, B is Cleared
SI Data
SO Data
Alternate 3: None of S, B, and L are Cleared
SI Data
SO Data
TP Port Partitioning Status
SI Data
SO Data
where n is a port number in the range 0–3.
The response to this command gives the partitioning
status of all four TP ports. If a port is disabled, reading
its partitioning status will indicate that it is connected.
Bit Rate Error Status of TP Ports
SI Data
SO Data
where n is a port number in the range 0–3.
The response to this command gives the bit-rate-over-
flow or underflow (data rate mismatch) condition of all
the TP ports. A 1 indicates that the FIFO has overflowed
or underflowed due to the amount of data received by
the corresponding port.
E n = 0
E n = 1
Bit Rate Error
SQE Test Status
Loopback Error
P n = 0
P n = 1
1000 1011
PBSL 0000
1000 1101
PBSL 0000
1000 1001
PBSL 0000
1000 0000
0000 P3..P0
TP Port Partitioned
TP port Connected
1010 0000
0000 E3..E0
No Error
FIFO Overflow