AM79C985KCW AMD [Advanced Micro Devices], AM79C985KCW Datasheet - Page 26

• Manufacturer Part Number: AM79C985KCW
• Manufacturer: AMD [Advanced Micro Devices]

SET (Write Commands)
Chip Programmable Options
SI Data
SO Data (Pri)
SO Data (Sec)
The eIMR+ chip programmable options can be enabled
(or disabled) by setting (or resetting) one or more of the
C, S, and A bits in the command string. The three pro-
grammable options are C - CI Reporting, S - AUI test
mask, and A - Alternate port activity monitor (PAM)
function.
C
This bit, when set, indicates to the eIMR+ device that it
is connected to a HIMIB device.
S
Setting this bit allows the eIMR+ chip to ignore activity
on the CI signal pair, during the SQE test window, fol-
lowing a transmission on the AUI port. Enabling this
function does not prevent the reporting of this condi-
tion by the eIMR+ device. The two functions operate
independently.
The SQE Test Window, as defined in IEEE 802.3 (Sec-
tion 7.2.2.2.4) is from 6 bit times to 34 bit times (0.6 s
to 3.4 s). This includes the delay introduced by a 50-
m AUI. CI activity that occurs outside this window is not
ignored and is treated as a true collision.
A
Setting this bit causes the Port Activity Monitor (PAM)
function to be altered such that the CRS data is pre-
sented unmodified. In default operation, CRS is
masked if the port is either disabled or partitioned. Note
that the HIMIB device resets this bit (default operation).
Alternate AUI Partitioning Algorithm
SI Data
SO Data (Pri)
SO Data (Sec)
Invoking this command sets the partition/reconnection
scheme for the AUI port to the alternate (transmit-only)
reconnection algorithm. To return the AUI port to the
standard (transmit or receive) reconnection algorithm,
it is necessary to reset the eIMR+ device. The standard
partitioning algorithm is selected on reset. If two eIMR+
devices are connected, this command sets both AUI
ports.
Alternate TP Partitioning Algorithm
SI Data
SO Data (Pri)
SO Data (Sec)
Invoking this command sets the partition/reconnection
scheme for the TP ports to the alternate (transmit-only)
26
HIMIB Connection
AUI SQE Test Mask
Alternate Port Activity Monitor Function
0000 1CSA
None
None
0001 1111
None
None
0001 0000
None
None
P R E L I M I N A R Y
Am79C985
reconnection algorithm. To return the TP ports to the
standard (transmit or receive) reconnection algorithm,
it is necessary to reset the eIMR+ device. The standard
partitioning algorithm is selected on reset.
Primary AUI Port Disable
SI
SO Data (Pri)
SO Data (Sec)
This command disables the AUI port on the primary
eIMR+ device. Subsequently the eIMR+ chip will ig-
nore all inputs to this port and will not transmit a DAT or
JAM pattern on the AUI port. Disabling the AUI port
also sets the partitioning state machine of the AUI port
to the idle state. Therefore, a partitioned port can be re-
connected by first disabling the AUI port and then en-
abling the AUI port.
The AUI port on the primary eIMR+ device defaults to
enabled on reset.
Secondary AUI Port Disable
SI Data
SO Data (Pri)
SO Data (Sec)
This command disables the AUI port on the eIMR+ de-
vice designated as the secondary HIMIB attachment.
Subsequently the eIMR+ chip will ignore all inputs to
this port and will not transmit a DAT or JAM pattern on
the AUI port. Disabling the AUI port also sets the parti-
tioning state machine of the AUI port to the idle state.
Therefore, a partitioned port can be reconnected by first
disabling the AUI port and then enabling the AUI port.
The AUI port on the secondary eIMR+ device defaults
to enabled on reset.
Primary AUI Port Enable
SI
SO Data (Pri)
SO Data (Sec)
This command enables the AUI port on the primary
eIMR+ device.
Secondary AUI Port Enable
SI Data
SO Data (Pri)
SO Data (Sec)
This command enables the AUI port on the eIMR+ de-
vice designated as the secondary HIMIB attachment.
When enabled, the secondary AUI port is fully func-
tional, and can be controlled by the serial/management
interface. However, when used with the Am79C987 de-
vice, no status is displayed for this port since the HIMIB
device does not manage this port. At reset, this port is
enabled.
0010 1111
None
None
0010 1110
None
None
0011 1111
None
None
0011 1110
None
None