9UMS9610CKLF IDT [Integrated Device Technology], 9UMS9610CKLF Datasheet - Page 7

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9UMS9610CKLF

Manufacturer Part Number
9UMS9610CKLF
Description
PC MAIN CLOCK
Manufacturer
IDT [Integrated Device Technology]
Datasheet

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CLK and falling edge of CLK#. It is measured using a +/-75mV window centered on the average cross point where CLK meets
CLK#. The average cross point is used to calculate the voltage thresholds the oscilloscope is to use for the edge rate
calculations.
6
7
8
9
1
2
Notes on Electrical Characteristics:
Clock Periods Differential Outputs with Spread Spectrum Enabled
Clock Periods Differential Outputs with Spread Spectrum Disabled
Electrical Characteristics - SMBus Interface
Guaranteed by design and characterization, not 100% tested in production.
Measurement Window
Measurement Window
Guaranteed by design and characterization, not 100% tested in production.
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REFOUT is at 14.31818MHz
Slew rate measured through Vswing centered around differential zero
Vxabs is defined as the voltage where CLK = CLK#
Only applies to the differential rising edge (CLK rising and CLK# falling)
Defined as the total variation of all crossing voltages of CLK rising and CLK# falling. Matching applies to rising edge rate of
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is at 14.31818MHz
Operation under these conditions is neither implied, nor guaranteed.
Maximum input voltage is not to exceed maximum VDD
See PCI Clock-to-Clock Delay Figure
Maximum SMBus Operating
ICS9UMS9610
PC MAIN CLOCK
TM
Low-level Output Voltage
/ICST
Clock/Data Rise Time
Clock/Data Fall Time
Definition
Definition
Current sinking at
Symbol
Symbol
SMBus Voltage
PARAMETER
V
SCLK/SDATA
SCLK/SDATA
OLSMB
M
Frequency
PC MAIN CLOCK
SRC 100
CPU 100
CPU 133
SRC 100
CPU 100
CPU 133
DOT 96
= 0.4 V
Absolute
Minimum
Absolute
Minimum
Absolute
Absolute
10.16560
1 Clock
9.87400
9.91400
7.41425
1 Clock
9.87400
9.91400
7.41425
Period
Period
Period
Period
Lg-
Lg-
SYMBOL
Short-term
Short-term
Minimum
Minimum
Absolute
Absolute
F
Average
Average
V
I
9.99900
9.99900
7.49925
PULLUP
T
Period
Period
T
SMBUS
V
OLSMB
-SSC
-SSC
1us
1us
RI2C
FI2C
DD
Long-Term
Long-Term
-ppm error
-ppm error
Minimum
Minimum
Absolute
Absolute
10.41560
Average
Average
9.99900
9.99900
7.49925
9.99900
9.99900
7.49925
Period
Period
0.1s
0.1s
(Max VIL - 0.15) to
(Min VIH + 0.15) to
(Min VIH + 0.15)
(Max VIL - 0.15)
CONDITIONS
SMB Data Pin
Block Mode
Nominal
10.00000
10.00000
Nominal
10.00000
10.00000
10.41670
7.50000
7.50000
Period
Period
@ I
0ppm
0ppm
0.1s
0.1s
PULLUP
+ ppm error
+ ppm error
Long-Term
Long-Term
7
Maximum
Maximum
10.00100
10.00100
10.00100
10.00100
10.41770
Average
Average
7.50075
7.50075
0.1s
0.1s
Short-term
Short-term
Maximum
Maximum
10.05130
10.05130
Average
Average
7.53845
+SSC
+SSC
1us
1us
MIN
2.7
4
Maximum
Maximum
10.17630
10.13630
10.17630
10.13630
10.66770
1 Clock
7.62345
1 Clock
7.62345
Period
Period
Lg+
Lg+
MAX
1000
300
100
3.6
0.4
UNITS Notes
kHz
mA
Units
Units
ns
ns
V
V
ns
ns
ns
ns
ns
ns
ns
1
1
1
1
1
1
Notes
Notes
1,2
1,2
1,2
1,2
1,2
1,2
1,2
1336—06/01/09

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