MX29F200BTC-70 Macronix International Co., MX29F200BTC-70 Datasheet

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MX29F200BTC-70

Manufacturer Part Number
MX29F200BTC-70
Description
Manufacturer
Macronix International Co.

Specifications of MX29F200BTC-70

Case
TSOP48
Date_code
2006+

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MX29F200BTC-70
Manufacturer:
LT
Quantity:
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Part Number:
MX29F200BTC-70
Manufacturer:
MX
Quantity:
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FEATURES
• 5.0V±10% for read, erase and write operation
• 131072x16/262144x8 switchable
• Fast access time: 55/70/90/120ns
• Low power consumption
• Command register architecture
• Auto Erase (chip) and Auto Program
• Status Reply
• Ready/Busy pin(RY/BY)
• Compatibility with JEDEC standard
GENERAL DESCRIPTION
The MX29F200T/B is a 2-mega bit, single 5 Volt Flash
memory organized as 1M word x16 or 2M bytex8 MXIC's
Flash memories offer the most cost-effective and reli-
able read/write non-volatile random access memory.
The MX29F200T/B is packaged in 44-pin SOP and 48-
pin TSOP. It is designed to be reprogrammed and
erased in-system or in-standard EPROM programmers.
The standard MX29F200T/B offers access time as fast
as 55ns, allowing operation of high-speed microproces-
sors without wait states. To eliminate bus contention, the
MX29F200T/B has separate chip enable (CE) and output
enable (OE ) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29F200T/B uses a command register to manage this
functionality. The command register allows for 100%
P/N:PM0549
- 40mA maximum active current@5MHz
- 1uA typical standby current
- Byte/Word Programming (7us/12us typical)
- Erase (16K-Bytex1, 8K-Bytex2, 32K-Bytex1, and
64K-Byte x3)
- Automatically erase any combination of sectors or
the whole chip with Erase Suspend capability.
- Automatically program and verify data at specified
address
- Data polling & Toggle bit for detection of program
and erase cycle completion.
- Provides a hardware method or detecting program
or erase cycle completion
- Pinout and software compatible with single-power
supply Flash
2M-BIT [256Kx8/128Kx16] CMOS FLASH MEMORY
1
• Sector protection
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Code Sector Architecture
• Low VCC write inhibit is equal to or less than 3.2V
• Package type:
• Erase suspend/ Erase Resume
• Hardware RESET pin
• 20 years data retention
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields for
erase and programming operations produces reliable
cycling. The MX29F200T/B uses a 5.0V ± 10% VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up
protection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
- Superior inadvertent write protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Sector protect/unprotect for 5V only system or 5V/
12V system
- T = Top Boot Sector
- B = Bottom Boot Sector
- 44-pin SOP
- 48-pin TSOP
- Suspends an erase operation to read data from, or
program data to a sector that is not being erased, then
resume the erase operation.
- Resets internal state mechine to the read mode
MX29F200T/B
REV. 1.3, DEC. 24, 2001

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