K9F1208D0A SAMSUNG [Samsung semiconductor], K9F1208D0A Datasheet - Page 34

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K9F1208D0A

Manufacturer Part Number
K9F1208D0A
Description
64M x 8 Bit , 32M x 16 Bit NAND Flash Memory
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
K9F1208D0A
K9F1208U0A
Figure 9. Sequential Row Read1 Operation
Figure 8. Read2 Operation
R/B
I/O
CLE
CE
WE
ALE
R/B
RE
I/O
X
X
X16 device : A
X8 device : A
The Sequential Read 1 and 2 operation is allowed only within a block and after the last page of a block is read-
out, the sequential read operation must be terminated by bringing CE high. When the page address moves onto
the next block, read command and address must be given.
00h
01h
3
4
50h
Block
~ A
~ A
X16 device : A
7
X8 device : A
7
K9F1216D0A
K9F1216U0A
are "L"
Don’ t care
A
Start Add.(4Cycle)
0
~ A
7
Start Add.(4Cycle)
1st half array
& A
9
0
0
~ A
( 00h Command)
~ A
~ A
Data Field
25
2
3
& A
& A
9
9
2nd half array
~ A
~ A
t
R
25
25
Spare Field
Data Output
Data Field
t
R
Main array
1st
1st
2nd
Nth
(only for
34
On K9F1208U0A-Y,P,V,F or K9F1208D0A-Y,P
CE must be held low during tR
Spare Field
K9F1208U0A-Y,P,V,F or K9F1208D0A-Y,P
t
R
1st half array
Data Output
( 01h Command)
(528 Byte)
Data Field
Data Output(Sequential)
2nd
Spare Field
2nd half array
FLASH MEMORY
Spare Field
t
R
valid within a block)
1st
2nd
Nth
Data Output
(528 Byte)
Nth

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